74AHCT373Octal Transparent D-Type Latches With 3-State Outputs | Latches | 8 | Active | The ’AHCT373 devices are octal-transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.
The ’AHCT373 devices are octal-transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. |
| Flip Flops | 9 | Active | |
| Logic | 9 | Active | |
74AHCT5418-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs | Buffers, Drivers, Receivers, Transceivers | 16 | Active | The ’AHCT541 octal buffers/drivers are ideal for driving bus lines or buffer memory address registers. These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.
The ’AHCT541 octal buffers/drivers are ideal for driving bus lines or buffer memory address registers. These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout. |
| Integrated Circuits (ICs) | 11 | Active | |
74AHCT5948-Bit Shift Registers With Output Registers | Integrated Circuits (ICs) | 7 | Active | The SN74AHCT594 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register.
The SN74AHCT594 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. |
74AHCT595Eight-bit shift registers with tri-state output registers and TTL-compatible CMOS inputs | Integrated Circuits (ICs) | 12 | Active | The SNx4AHCT595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered.
The SNx4AHCT595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. |
74AHCT74Enhanced Product Dual Positive-Edge-Triggered D-Type Flip-Flop With Clear And Preset | Logic | 15 | Active | The SN74AHCT74 is a dual positive-edge-triggered D-type flip-flop.
A low level at the preset (PRE)\ or clear (CLR)\ inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
The SN74AHCT74 is a dual positive-edge-triggered D-type flip-flop.
A low level at the preset (PRE)\ or clear (CLR)\ inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. |
| Logic | 7 | Active | |
74AHCU04Automotive 6-ch, 2-V to 5.5-V inverters with TTL-compatible CMOS inputs | Integrated Circuits (ICs) | 14 | Active | The ’AHCU04 devices contain six independent inverters. These devices perform the Boolean function Y = A\. Internal circuitry consists of single-stage inverters that can be used in analog applications such as crystal oscillators.
The ’AHCU04 devices contain six independent inverters. These devices perform the Boolean function Y = A\. Internal circuitry consists of single-stage inverters that can be used in analog applications such as crystal oscillators. |
