SN74AHCT273 Series

Octal D-Type Flip-Flops With Clear

Catalog

Octal D-Type Flip-Flops With Clear

Part	Number of Elements	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Max Propagation Delay @ V, Max CL	Input Capacitance	Number of Bits per Element	Clock Frequency	Package / Case	Package / Case [y]	Package / Case [y]	Voltage - Supply [Min]	Voltage - Supply [Max]	Trigger Type	Mounting Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Current - Quiescent (Iq)	Type	Package / Case [x]
Texas Instruments SN74AHCT273DW	1	85 °C	-40 °C	Non-Inverted	9.2 ns	2.5 pF	8	75 MHz	20-SOIC	0.295 in	7.5 mm	4.5 V	5.5 V	Positive Edge	Surface Mount	8 mA	8 mA	20-SOIC	4 çA	D-Type
Texas Instruments SN74AHCT273DGVR	1	85 °C	-40 °C	Non-Inverted	9.2 ns	2.5 pF	8	75 MHz	20-TFSOP	0.173 in	4.4 mm	4.5 V	5.5 V	Positive Edge	Surface Mount	8 mA	8 mA	20-TVSOP	4 çA	D-Type
Texas Instruments SN74AHCT273PWR	1	85 °C	-40 °C	Non-Inverted	9.2 ns	2.5 pF	8	75 MHz	20-TSSOP	4.4 mm		4.5 V	5.5 V	Positive Edge	Surface Mount	8 mA	8 mA	20-TSSOP	4 çA	D-Type	0.173 in
Texas Instruments SN74AHCT273DWG4	1	85 °C	-40 °C	Non-Inverted	9.2 ns	2.5 pF	8	75 MHz	20-SOIC	0.295 in	7.5 mm	4.5 V	5.5 V	Positive Edge	Surface Mount	8 mA	8 mA	20-SOIC	4 çA	D-Type
Texas Instruments SN74AHCT273DWR	1	125 °C	-40 °C	Non-Inverted	9.2 ns	2.5 pF	8	75 MHz	20-SOIC	0.295 in	7.5 mm	4.5 V	5.5 V	Positive Edge	Surface Mount	8 mA	8 mA	20-SOIC	4 çA	D-Type
Texas Instruments SN74AHCT273DBRG4	1	85 °C	-40 °C	Non-Inverted	9.2 ns	2.5 pF	8	75 MHz	20-SSOP			4.5 V	5.5 V	Positive Edge	Surface Mount	8 mA	8 mA	20-SSOP	4 çA	D-Type

Catalog

Octal D-Type Flip-Flops With Clear

Key Features

• Inputs are TTL-voltage compatibleContain eight flip-flops with single-rail outputsDirect clear inputIndividual data input to each flip-flopLatch-up performance exceeds 250mA per JESD 17ESD protection exceeds JESD 222000V human-body model (A114-A)200V machine model (A115-A)1000V charged-device model (C101)Inputs are TTL-voltage compatibleContain eight flip-flops with single-rail outputsDirect clear inputIndividual data input to each flip-flopLatch-up performance exceeds 250mA per JESD 17ESD protection exceeds JESD 222000V human-body model (A114-A)200V machine model (A115-A)1000V charged-device model (C101)

Description

These devices are positive-edge-triggered D-type flip-flops with a direct clear ( CLR) input. These devices are positive-edge-triggered D-type flip-flops with a direct clear ( CLR) input.