STMicroelectronics

The M95320-A125 and M95320-A145 are 32-Kbit serial EEPROM Automotive grade devices operating up to 145°C. They are compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0. The devices are accessed by a simple serial SPI compatible interface running up to 20 MHz. The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95320-A125 and M95320-A145 are byte-alterable memories (4096 × 8 bits) organized as 128 pages of 32 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M95320-A125 and M95320-A145 offer an additional Identification Page (32 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.

The M95320-A125 and M95320-A145 are 32-Kbit serial EEPROM Automotive grade devices operating up to 145°C. They are compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0. The devices are accessed by a simple serial SPI compatible interface running up to 20 MHz. The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95320-A125 and M95320-A145 are byte-alterable memories (4096 × 8 bits) organized as 128 pages of 32 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M95320-A125 and M95320-A145 offer an additional Identification Page (32 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.

The M95320-A125 and M95320-A145 are 32-Kbit serial EEPROM Automotive grade devices operating up to 145°C. They are compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0. The devices are accessed by a simple serial SPI compatible interface running up to 20 MHz. The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95320-A125 and M95320-A145 are byte-alterable memories (4096 × 8 bits) organized as 128 pages of 32 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M95320-A125 and M95320-A145 offer an additional Identification Page (32 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.

The M95320-DRE is a 32-Kbit serial EEPROM device operating up to 105 °C. The M95320-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2. The device is accessed by a simple serial SPI compatible interface running up to 20 MHz. The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95320-DRE is a byte-alterable memory (4096 × 8 bits) organized as 128 pages of 32 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M95320-DRE offers an additional Identification Page (32 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.

The M95320 devices are Electrically Erasable PROgrammable Memories (EEPROMs) organized as 4096 x 8 bits, accessed through the SPI bus. The M95320 devices can operate with a supply range from 1.7 V to 5.5 V, and are guaranteed over the -40 °C/+85 °C temperature range.

The M95320 devices are Electrically Erasable PROgrammable Memories (EEPROMs) organized as 4096 x 8 bits, accessed through the SPI bus. The M95320 devices can operate with a supply range from 1.7 V to 5.5 V, and are guaranteed over the -40 °C/+85 °C temperature range.

The M95512-A125 and M95512-A145 are 512-Kbit serial EEPROM Automotive grade devices operating up to 145°C. They are compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0. The devices are accessed by a simple serial SPI compatible interface running up to 16 MHz. The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95512-A125 and M95512-A145 are byte-alterable memories (65536 × 8 bits) organized as 512 pages of 128 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M95512-A125 and M95512-A145 offer an additional Identification Page (128 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.

The M95512-A125 and M95512-A145 are 512-Kbit serial EEPROM Automotive grade devices operating up to 145°C. They are compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0. The devices are accessed by a simple serial SPI compatible interface running up to 16 MHz. The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95512-A125 and M95512-A145 are byte-alterable memories (65536 × 8 bits) organized as 512 pages of 128 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M95512-A125 and M95512-A145 offer an additional Identification Page (128 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.

The M95512-DRE is a 512-Kbit serial EEPROM device operating up to 105 °C. The M95512-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2. The device is accessed by a simple serial SPI compatible interface running up to 16 MHz. The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95512-DRE is a byte-alterable memory (65536 × 8 bits) organized as 512 pages of 128 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M95512-DRE offers an additional Identification Page (128 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.

The M95512 devices are electrically erasable programmable memories (EEPROMs) organized as 65536 x 8 bits, accessed through the SPI bus. The M95512-W can operate with a supply voltage from 2.5 V to 5.5 V, the M95512-R can operate with a supply voltage from 1.8 V to 5.5 V and the M95512-DF can operate with a supply voltage from 1.7 V to 5.5 V, over an ambient temperature range of -40 °C / +85 °C. The M95512-DF offers an additional page, named the Identification page (128 bytes). The Identification page can be used to store sensitive application parameters that can be (later) permanently locked in read-only mode. The SPI bus signals are C, D and Q, as shown in Figure 1 and Table 1. The device is selected when Chip select (S) is driven low. Communications with the device can be interrupted when the HOLD is driven low.