S
STMicroelectronics
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Part | Spec A | Spec B | Spec C | Spec D | Description |
|---|---|---|---|---|---|
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Part | Spec A | Spec B | Spec C | Spec D | Description |
|---|---|---|---|---|---|
| Part | Category | Description |
|---|---|---|
STMicroelectronics STEVAL-ISA068V1Obsolete | Development Boards Kits Programmers | EVAL BOARD FOR ST1S32 |
STMicroelectronics 74VCXHQ163245TTRObsolete | Integrated Circuits (ICs) | IC TRANSLATION TXRX 2.7V 48TSSOP |
STMicroelectronics | Development Boards Kits Programmers | VNQ9050LAJ EVALUATION BOARD |
STMicroelectronics LSM303DLHCTRObsolete | Sensors Transducers | IMU ACCEL/MAG 3-AXIS I2C 14LGA |
STMicroelectronics M93C56-WMN6TObsolete | Integrated Circuits (ICs) | EEPROM SERIAL-MICROWIRE 2K-BIT 256 X 8/128 X 16 3.3V/5V 8-PIN SO N T/R |
STMicroelectronics | Integrated Circuits (ICs) | STM32U |
STMicroelectronics TS831-3IZObsolete | Integrated Circuits (ICs) | IC SUPERVISOR 1 CHANNEL TO92-3 |
STMicroelectronics STMPE1208SQTRObsolete | Integrated Circuits (ICs) | IC I/O EXPANDER I2C 12B 40QFN |
STMicroelectronics STM32L1-MAGNETObsolete | Development Boards Kits Programmers | IAR EXPERIMENT STM32 L1 EVAL BRD |
STMicroelectronics VNB35N07Obsolete | Integrated Circuits (ICs) | IC PWR DRIVER N-CHAN 1:1 D2PAK |
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
M95160-A125Automotive 16-Kbit SPI bus EEPROM with high speed clock | Integrated Circuits (ICs) | 2 | Active | The M95160-A125 and M95160-A145 are 16-Kbit serial EEPROM automotive grade devices operating up to 145 °C. They are compliant with the very high level of reliability defined by the automotive standard AEC-Q100 grade 0.
The devices are accessed by a simple serial SPI compatible interface running up to 20 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95160-A125 and M95160-A145 are byte-alterable memories (2048 × 8 bits) organized as 64 pages of 32 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M95160-A125 and M95160-A145 offer an additional Identification Page (32 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
M95160-DF16-Kbit SPI bus EEPROM with high-speed clock | Integrated Circuits (ICs) | 1 | Active | The M95160 devices are Electrically Erasable PROgrammable Memories (EEPROMs) organized as 2048 x 8 bits, accessed through the SPI bus.
The M95160-W can operate with a supply voltage from 2.5 V to 5.5 V, the M95160-R can operate with a supply voltage from 1.8 V to 5.5 V, and the M95160-DF can operate with a supply voltage from 1.7 V to 5.5 V, over an ambient temperature range of -40 °C / +85 °C.
The M95160-D offers an additional page, named the Identification Page (32 bytes). The Identification Page can be used to store sensitive application parameters which can be (later) permanently locked in Read-only mode. |
M95160-DRE16-Kbit serial SPI bus EEPROM with high speed clock 105°C operation | Memory | 1 | Active | The M95160-DRE is a 16-Kbit serial EEPROM device operating up to 105 °C. The M95160-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.
The device is accessed by a simple serial SPI compatible interface running up to 20 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95160-DRE is a byte-alterable memory (2048 × 8 bits) organized as 64 pages of 32 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M95160-DRE offers an additional Identification Page (32 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
M95160-R16 Kbit SPI bus EEPROM with high-speed clock | Integrated Circuits (ICs) | 3 | Active | The M95160 devices are Electrically Erasable PROgrammable Memories (EEPROMs) organized as 2048 x 8 bits, accessed through the SPI bus.
The M95160-W can operate with a supply voltage from 2.5 V to 5.5 V, the M95160-R can operate with a supply voltage from 1.8 V to 5.5 V, and the M95160-DF can operate with a supply voltage from 1.7 V to 5.5 V, over an ambient temperature range of -40 °C / +85 °C.
The M95160-D offers an additional page, named the Identification Page (32 bytes). The Identification Page can be used to store sensitive application parameters which can be (later) permanently locked in Read-only mode. |
M95256Automotive 256 Kbit SPI bus EEPROM with high speed clock | Integrated Circuits (ICs) | 10 | Active | The M95256-A125 and M95256-A145 are 256-Kbit serial EEPROM Automotive grade devices operating up to 145°C. They are compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0.
The devices are accessed by a simple serial SPI compatible interface running up to 20 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95256-A125 and M95256-A145 are byte-alterable memories (32768 × 8 bits) organized as 512 pages of 64 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M95256-A125 and M95256-A145 offer an additional Identification Page (64 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
M95256-A125Automotive 256 Kbit SPI bus EEPROM with high speed clock | Memory | 1 | Active | The M95256-A125 and M95256-A145 are 256-Kbit serial EEPROM Automotive grade devices operating up to 145°C. They are compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0.
The devices are accessed by a simple serial SPI compatible interface running up to 20 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95256-A125 and M95256-A145 are byte-alterable memories (32768 × 8 bits) organized as 512 pages of 64 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M95256-A125 and M95256-A145 offer an additional Identification Page (64 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
M95256-DF256-Kbit serial SPI bus EEPROM with high speed clock | Memory | 3 | Active | The M95256 devices are electrically erasable programmable memories (EEPROMs) organized as 32768 x 8 bits, accessed through the SPI bus.
The M95256-W can operate with a supply voltage from 2.5 V to 5.5 V, the M95256-R can operate with a supply voltage from 1.8 V to 5.5 V and the M95256-DF can operate with a supply voltage from 1.7 V to 5.5 V, over an ambient temperature range of -40 °C / +85 °C.
The M95256-DF, -DR or -DW (hereinafter referred to as M95256-Dx) offer an additional page, named the Identification page (64 bytes). The Identification page can be used to store sensitive application parameters that can be (later) permanently locked in read-only mode.
The SPI bus signals are C, D and Q, as shown in Figure 1 and Table 1. The device is selected when Chip select (S) is driven low. Communications with the device can be interrupted when the HOLD is driven low. |
M95256-DRE256-Kbit serial SPI bus EEPROM with high speed clock 105°C operation | Memory | 1 | Active | The M95256-DRE is a 256-Kbit serial EEPROM device operating up to 105 °C. The M95256-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.
The device is accessed by a simple serial SPI compatible interface running up to 20 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95256-DRE is a byte-alterable memory (32768 × 8 bits) organized as 512 pages of 64 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M95256-DRE offers an additional Identification Page (64 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
M95256-R256 Kbit SPI bus EEPROM with high-speed clock | Memory | 2 | Active | The M95256 devices are electrically erasable programmable memories (EEPROMs) organized as 32768 x 8 bits, accessed through the SPI bus.
The M95256-W can operate with a supply voltage from 2.5 V to 5.5 V, the M95256-R can operate with a supply voltage from 1.8 V to 5.5 V and the M95256-DF can operate with a supply voltage from 1.7 V to 5.5 V, over an ambient temperature range of -40 °C / +85 °C.
The M95256-DF, -DR or -DW (hereinafter referred to as M95256-Dx) offer an additional page, named the Identification page (64 bytes). The Identification page can be used to store sensitive application parameters that can be (later) permanently locked in read-only mode.
The SPI bus signals are C, D and Q, as shown in Figure 1 and Table 1. The device is selected when Chip select (S) is driven low. Communications with the device can be interrupted when the HOLD is driven low. |
M95256-W256 Kbit SPI bus EEPROM with high-speed clock | Integrated Circuits (ICs) | 1 | Active | The M95256 devices are electrically erasable programmable memories (EEPROMs) organized as 32768 x 8 bits, accessed through the SPI bus.
The M95256-W can operate with a supply voltage from 2.5 V to 5.5 V, the M95256-R can operate with a supply voltage from 1.8 V to 5.5 V and the M95256-DF can operate with a supply voltage from 1.7 V to 5.5 V, over an ambient temperature range of -40 °C / +85 °C.
The M95256-DF, -DR or -DW (hereinafter referred to as M95256-Dx) offer an additional page, named the Identification page (64 bytes). The Identification page can be used to store sensitive application parameters that can be (later) permanently locked in read-only mode.
The SPI bus signals are C, D and Q, as shown in Figure 1 and Table 1. The device is selected when Chip select (S) is driven low. Communications with the device can be interrupted when the HOLD is driven low. |