Renesas Electronics Corporation

MC100ES6254 is designed for very skew critical differential clock distribution systems and supports clock frequencies from DC up to 3.0 GHz. Typical applications for the MC100ES6254 are primary clock distribution, switching and loopback systems of high-performance computer, networking and telecommunication systems, as well as on-board clocking of OC-3, OC-12 and OC-48 speed communication systems. Primary purpose of the MC100ES6254 is high-speed clock switching applications. In addition, the MC100ES6254 can be configured as single 1:6 or dual 1:3 LVPECL fanout buffer for clock signals, or as loopback device in high-speed data applications. The MC100ES6254 can be operated from a 3.3 V or 2.5 V positive supply without the requirement of a negative supply line.

The MC100ES6535 is a low skew, high performance 3.3 V 1-to-4 LVCMOS to LVPECL fanout buffer. The ES6535 has two selectable inputs that allow LVCMOS or LVTTL input levels which translate to LVPECL outputs. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. The ES6535 is ideal for high performance clock distribution applications.

The MK1491-06 is a low-cost, low-jitter, high-performance clock synthesizer for AMD's Geode-based computer and portable appliance applications. Using patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 14.318 MHz crystal input to produce multiple output clocks. It provides selectable PCI local bus and AC97 clocks, 24 MHz and 48 MHz clocks for Super I/O and USB, as well as multiple Reference outputs. The device has a power down mode to reduce power consumption.

The MK1491-09 is a low cost, low jitter, high performance clock synthesizer for AMD's Geode™ GX2 processor for information appliance applications. Using patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 14.318 MHz crystal input to produce multiple output clocks. It provides selectable PCI local bus clocks, 48 MHz clocks for Super I/O and USB, as well as multiple Reference outputs. The device has a power down mode to reduce power consumption.

The MK1574-01 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference, and generates many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to the 8 kHz backplane clock, simplifying clock generation and distribution in communications systems.