Renesas Electronics Corporation

The M675 is a Voltage Controlled SAW Oscillator (VCSO) frequency source for low-jitter clock generation. An integrated surface acoustic wave (SAW) delay line implements the high-Q voltage controlled oscillator (VCO) function, which results in low output phase noise and very low jitter. The M675-01 is available in a range of center frequencies from 125MHz to 175MHz. The M675-02 provides 500MHz to 700MHz. The guaranteed minimum pull-range of ±100ppm meets GbE requirements. It also fully satisfies the ±50ppm minimum pull-range specification commonly required. Industry-standard Kvco (VCO Gain) provides full replacement compatibility. The M675 is well suited for phase-locked loop implementations, clock and data recovery circuits, and other timing applications in telecom and optical fiber networking systems (e.g., SONET/SDH).

The M675S02 is a single frequency/single output SAW-based VCSO for low-jitter clock generation. The SAW (surface acoustic wave) delay line serves as a high-Q resonator and the low noise SiGe VCSO IC provides a low noise floor and low 1/f phase noise. The combination of the SAW delay line and the custom IC result in very low phase noise and jitter performance. The M675S02 is available in frequencies from 500 to 1000 MHz with a guaranteed minimum pull-range of ±120 ppm. Industry-standard Kvco (VCO Gain) provides full replacement compatibility for most designs. The M675S02 is well suited for phase-locked loop applications, clock and data recovery circuits and other timing applications in telecom and optical fiber networking systems.

The M690SDM is a single frequency/single output SAW-based VCSO for low-jitter clock generation. The M690SDM incorporates an analog X2 frequency multiplier to provide an output frequency that is twice that of the fundamental VCSO frequency.

The M695SDM Voltage Controlled SAW Oscillator (VCSO) is a single output low noise oscillator that incorporates an analog X2 frequency multiplier to provide an output frequency that is twice that of the fundamental VCSO frequency. The M695SDM makes use of Renesas' RF circuit design capability and SAW technology to provide a high level of performance. The fundamental frequency VCSO is implemented as a discrete circuit with varactor tuning to give the lowest possible phase noise. A SAW quartz delay line is the frequency controlling element in the oscillator resulting in low phase noise, temperature stability, and a repeatable linear tuning characteristic. An RF transistor is used for frequency multiplication. The M695SDM VCSO is manufactured on a 13mm x 20mm FR4 PCB. A metal cover is used to protect the circuitry and provide RF shielding.

The M902-01 is a Phase-Locked Loop (PLL) based clock generator that uses an internal Voltage Controlled SAW Oscillator (VCSO) to produce a very low jitter output clock. It is ideal for Gigabit Ethernet. The output clock (frequency of 156.25MHz or 187.50MHz for example) is provided from two LVPECL clock output pairs (Specify frequency at the time of order). The accuracy of the output frequency is assured by the internal PLL, which phase-locks the internal VCSO to the reference input frequency (25MHz or 30MHz for example). The input reference can either be an external crystal, utilizing the internal crystal oscillator, or a stable external clock source such as a packaged crystal oscillator.

The M906-01 is a PLL (Phase Locked Loop) based clock generator that uses an internal VCSO (Voltage Controlled SAW Oscillator) to produce a very low jitter output clock. It is ideal for Gigabit Ethernet. The output clock (frequency of 156.25 or 187.50MHz for example) is provided from six LVPECL clock output pairs. (Specify frequency at time of order.) The accuracy of the output frequency is assured by the internal PLL, which phase-locks the internal VCSO to the reference input frequency (25 or 30MHz for example). The input reference can either be an external crystal, utilizing the internal crystal oscillator, or a stable external clock source such as a packaged crystal oscillator.