| Application Specific | 2 | Obsolete | |
NB4N840M2 x 2 Crosspoint Switch, Dual, 3.3 V, 3.2 Gb / s, with CML Outputs | Evaluation Boards | 2 | Active | The NB4N840M is a high−bandwidth fully differential dual 2 x 2 crosspoint switch with CML inputs/outputs that is suitable for applications such as SDH/SONET DWDM and high speed switching. Fully differential design techniques are used to minimize jitter accumulation, crosstalk, and signal skew, which make this device ideal for loop−through and protection channel switching applications.Internally terminated differential CML inputs accept AC−coupled LVPECL (Positive ECL) or direct coupled CML signals. By providing internal 50 Ohm input and output termination resistor, the need for external components is eliminated and interface reflections are minimized. Differential 16 mA CML outputs provide matching internal 50 Ohm terminations, and 400 mV output swings when externally terminated, 50 Ohm to VCC.Single−ended LVCMOS/LVTTL SEL inputs control the routing of the signals through the crosspoint switch which makes this device configurable as 1:2 fan−out, repeater or 2 x 2 crosspoint switch. The device is housed in a low profile 5 x 5 mm 32−pin QFN package. |
NB4N855STranslator, 3.3 V, 1.5 Gb/s Dual AnyLevel™ to LVDS Receiver/Driver/Buffer | Evaluation and Demonstration Boards and Kits | 2 | Active | NB4N855S is a clock or data Receiver/Driver/Buffer/Translator capable of translating AnyLevelTM input signal (LVPECL, CML, HSTL, LVDS, or LVTTL/LVCMOS) to LVDS. Depending on the distance, noise immunity of the system design, and transmission line media, this device will receive, drive or translate data or clock signals up to 1.5 Gb/s or 1.0 GHz, respectively. This device is pin-for-pin plug in compatible to the SY55855V in a 3.3 V applications.The NB4N855S has a wide input common mode range of GND + 50 mV to VCC - 50 mV. This feature is ideal for translating differential or single-ended data or clock signals to 350 mV typical LVDS output levels.The device is offered in a small 10 lead MSOP package. NB4N855S is targeted for data, wireless and telecom applications as well as high speed logic interface where jitter and package size are main requirements. |
| Clock/Timing | 2 | Obsolete | |
NB6L11MClock / Data Fanout Buffer, 1:2 Differential, with CML Outputs | Integrated Circuits (ICs) | 4 | Active | The NB6L11M is a differential 1:2 CML fanout buffer. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VT pins and will accept LVPECL, LVCMOS, LVTTL, CML, or LVDS logic levels. The VREFAC pin is an internally generated voltage supply available to this device only. VREFAC is used as a reference voltage for single-ended PECL or NECL inputs. For all single-ended input conditions, the unused complementary differential input is connected to VREFAC as a switching reference voltage. VREFAC may also rebias capacitor-coupled inputs. When used, decouple VREFAC with a 0.01uF capacitor and limit current sourcingor sinking to 0.5 mA. When not used, VREFAC output should be left open. The device is housed in a small 3x3 mm 16 pin QFN package. The NB6L11M is a member of the ECLinPS MAX family of high performance clock products. |
NB6L14MClock / Data Fanout Buffer, 1:4 AnyLevel™ Input, LVDS, 2.5 V | Development Boards, Kits, Programmers | 3 | Active | The NB6L14S is a differential 1:4 Clock or Data Receiver and will accept AnyLevel differential input signals: LVPECL, CML, LVDS, or HCSL. These signals will be translated to LVDS and four identical copies of Clock or Data will be distributed, operating up to 2.0GHz or 2.5Gbps, respectively. As such, the NB6L14S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB6L14S has a wide input common mode range from GND plus 50mV to VCC-50mV. Combined with the 50-ohm internal termination resistors at the inputs, the NB6L14S is ideal for translating a variety of differential or single-ended Clock or Data signals to 350mV typical LVDS output levels. The NB6L14S is the 2.5V version of the NB6N14S and is offered in a small 3mm x 3mm 16-QFN package. Application notes, models, and support documentation are available at www.onsemi.com. The NB6L14S is a member of the ECLinPS MAX family of high performance products. |
| Clock Buffers, Drivers | 5 | Obsolete | |
| Clock/Timing | 2 | Obsolete | |
NB6L56Clock / Data Multiplexer, 2.5 V / 3.3 V Dual 2:1 Differential, with LVPECL Outputs | Clock Buffers, Drivers | 2 | Active | The NB6L56 is a high performance Dual 2-to-1 Differential Clock or Data multiplexer. The Multi-Level differential inputs incorporate internal 50 Ohms termination resistors that are accessed through the VT pin. This feature allows the NB6L56 to accept various Differential logic level standards, such as LVPECL, CML or LVDS. Outputs are 800 mV LVPECL signals. |
| Clock Buffers, Drivers | 1 | Obsolete | |
