ON Semiconductor

The NB3N51044 is a precision, low phase noise clock generator that supports PCI Express and sRIO clock requirements. The device accepts a 25 MHz fundamental mode parallel resonant crystal or a 25 MHz single ended reference clock signal and generates four differential HCSL/LVDS outputs of 100 MHz or 125 MHz clock frequency based on frequency select input F_SEL. NB3N51044 is configurable to bypass the PLL from signal path using BYPASS, and provides the output frequency through the divider network. All clock outputs can be individually enabled / disabled through hardware input pins OE. In addition, device can be reset using Master Reset input pin MR_OE#.

The NB3N5573 is a high precision, low phase noise clock generator that supports PCI Express and Ethernet requirements. The device is accepts a 25 MHz fundamental mode parallel resonant crystal and generates differential HCSL output at 25 MHz, 100 MHz, 125 MHz or 200 MHz clock frequencies.

The NB3RL02 is a low-skew, low jitter 1:2 clock fan-out buffer, ideal for use in portable end-equipment, such as mobile phones. With integrated LDO and output control circuitry. The MCLK_IN pin has an AC coupling capacitor and will directly accept a square or sine wave clock input, such as a temperature compensated crystal oscillator (TCXO). The minimum acceptable input amplitude of the sine wave is 300 mV peak-to-peak. The two clock outputs are enabled by control inputs CLK_REQ1 and CLK_REQ2. The NB3RL02 has an integrated Low-Drop-Out (LDO) voltage regulator which accepts input voltages from 2.3 V to 5.5 V and outputs 1.8 V at Iout = 50 mA. This 1.8 V supply is externally available to provide regulated power to peripheral devices, such as a TCXO. The adaptive clock output buffers offer controlled slew-rate over a wide capacitive loading range which minimizes EMI emissions, maintains signal integrity, and minimizes ringing caused by signal reflections on the clock distribution lines. The NB3RL02 is offered in a 0.4 mm pitch wafer-level-chip-scale (WLCS) package (0.77 mm x 1.57 mm) and is optimized for very low standby current consumption.

The NB3V1106C is a member of the NB3V110xC a modular, high−performance, low−skew, general purpose LVCMOS clock buffer family. The device has a 1:6 fan-out. The family of devices is designed with a modular approach. Different fan-out variations, 1:2, 1:3, 1:4, 1:6 and 1:8, are available. All of the devices are pin compatible to each other for easy handling. All family members share the same high performing characteristics like low additive jitter, low skew, and wide operating temperature range. The NB3V110xCsupports an asynchronous output enable control (OE) which switchesthe outputs into a low state when OE is low. The NB3V110xC operatein a 3.3 V, 2.5 V and 1.8 V environment and are characterized for operation from –40°C to 105°C.