Microchip Technology

The LAN9211 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9211 has been specifically designed to provide high performance and throughput for 16-bit applications. The LAN9211 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX. The LAN9211 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9211 also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9211 memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity. The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the[93AA46AE48](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN9215(i) is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9215(i) has been architected to provide the best price-performance ratio for any 16-bit application with medium performance requirements. The LAN9215(i) is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX. The LAN9215(i) includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus. The LAN9215(i) includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9215(i) memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity. The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the [**93AA46AE48**](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN9217 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9217 has been specifically architected to provide the highest performance possible for any 16-bit application. The LAN9217 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX. The LAN9217 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus. The LAN9217 includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9217 memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity. The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the [**93AA46AE48**](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN9218(i) is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9218(i) has been specifically architected to provide the highest performance possible for any given architecture. The LAN9218(i) is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX. The LAN9218(i) includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit and 32-bit microprocessors and microcontrollers. The LAN9218(i) includes large transmit and receive data FIFOs with a high-speed host bus interface to accommodate high bandwidth, high latency applications. In addition, the LAN9218(i) memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity. The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the [**93AA46AE48**](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN9221/LAN9221i is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9221/LAN9221i has been specifically designed to provide high performance and throughput for 16-bit applications. The LAN9221/LAN9221i is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX. The variable voltage I/O signals of the LAN9221/LAN9221i accommodate lower voltage I/O signaling without the need for voltage level shifters. The LAN9221/LAN9221i includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9221/LAN9221i also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9221/LAN9221i memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity. The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the [93AA46AE48](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN9250 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9250 has been specifically designed to provide high performance and throughput for 16-bit applications. The LAN9250 complies with the IEEE802.3 (full/half-duplex 10BASE-T and 100BASE-TX) Ethernet protocol, IEEE 802.3az Energy Efficient Ethernet (EEE) (100Mbps only), and the IEEE 1588v2 precision time protocol. 100BASE-FX is supported via an external fiber transceiver. The LAN9250 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. For additional design flexibility SPI and SQI interfaces are also supported. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9250 also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9250 memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity. The LAN9250 also supports features which reduce or eliminate packet loss. The internal 16-KByte SRAM can hold over 200 received packets. If the receive FIFO gets too full, the LAN9250 can automatically generate flow control packets to the remote node, or assert back-pressure on the remote node by generating network collisions. The LAN9250 can be configured to operate via a single 3.3V supply utilizing an integrated 3.3V to 1.2V linear regulator. The linear regulator may be optionally disabled, allowing usage of a high efficiency external regulator for lower system power dissipation Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

Microchip’s LAN9253 is a 3 port EtherCAT device controller (ESC) with dual integrated Ethernet PHYs which each provide a full-duplex 100BASE-TX transceiver and support 100Mbps (100BASE-TX) operation. The LAN9253 supports HP Auto-MDIX, allowing the use of direct connect or cross-over LAN cables. This device provides system developers a cost-effective solution for realizing EtherCAT device solutions. The LAN9253 includes a 3 port EtherCAT device controller with 8K bytes of Dual Port memory (DPRAM), 8 SyncManagers, 8 Fieldbus Memory Management Units (FMMUs) and a 64-bit Distributed Clock. This product includes feature additions over LAN9252 which answer our customers' requests for enhanced cycle time, integration and system level cost savings. It supports multiple Process Data Interfaces - SPI/SQI, HBI and Digital IO. SPI and SQI (high speed SPI) provide a low pin count synchronous device interface that facilitates communication between the device and a host system. Whereas, the Host Bus Interface facilitates the same via a high-speed asynchronous device interface. For simple digital modules without micro-controllers, the LAN9253 can also operate in Digital I/O Mode where 16 digital signals can be controlled or monitored by the EtherCAT master. The LAN9253 can be configured to operate via a single 3.3V supply utilizing an integrated 3.3V to 1.2V linear regulator. The internal linear regulator may also be disabled, allowing usage of a high efficiency external regulator for lower system power dissipation. The LAN9253 is available in commercial, industrial and extended industrial temperature ranges and is packaged in 64 pin QFN. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

Microchip’s LAN9254 is a 3 port EtherCAT device controller (ESC) with dual integrated Ethernet PHYs which each provide a full-duplex 100BASE-TX transceiver and support 100Mbps (100BASE-TX) operation. The LAN9254 supports HP Auto-MDIX, allowing the use of direct connect or cross-over LAN cables. This device provides system developers a cost-effective solution for realizing EtherCAT device solutions. The LAN9254 includes a 3 port EtherCAT device controller with 8K bytes of Dual Port memory (DPRAM), 8 SyncManagers, 8 Fieldbus Memory Management Units (FMMUs) and a 64-bit Distributed Clock. This device includes feature additions over LAN9252 and LAN9253 which answer our customers' requests for enhanced cycle time, additional IO channels, integration and system level cost savings. It supports multiple Process Data Interfaces - SPI/SQI, HBI and Digital IO. SPI and SQI (high speed SPI) provide a low pin count synchronous device interface that facilitates communication between the device and a host system. Whereas, the Host Bus Interface facilitates the same via a high-speed asynchronous device interface. For simple digital modules without micro-controllers, the LAN9254 can also operate in Digital I/O Mode where 32 digital signals can be controlled or monitored by the EtherCAT master. LAN9254 also supports a fully de-multiplexed host interface The LAN9254 can be configured to operate via a single 3.3V supply utilizing an integrated 3.3V to 1.2V linear regulator. The internal linear regulator may also be disabled, allowing usage of a high efficiency external regulator for lower system power dissipation. The LAN9254 is available in commercial, industrial and extended industrial temperature ranges and is packaged in 80 pin TQFN. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

Microchip’s LAN9255 is an EtherCAT device controller (ESC) with Cortex M4F Microcontroller. EtherCAT functionality is delivered together with dual PHYs which each provide a full-duplex 100BASE-TX transceiver and support 100Mbps (100BASE-TX) operation. The LAN9255 supports HP Auto-MDIX, allowing the use of direct connect or cross-over LAN cables. This device provides system developers a cost-effective solution for realizing EtherCAT device solutions. The 3 port EtherCAT device controller provides 8K bytes of Dual Port memory (DPRAM), 8 SyncManagers, 8 Fieldbus Memory Management Units (FMMUs) and a 64-bit Distributed Clock. A CortexM4F controller provides a suite of peripherals including Ethernet MAC. Customers can realize multiprotocol designs in the knowledge all items are supported within the MPLABX Harmony Framework The LAN9255 is available in commercial, industrial and extended industrial temperature ranges and is packaged in 128 pin TQFP. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.