LAN9221 Series
10/100 Base-T/TX Ethernet Controller with 16 Bit Interface
Manufacturer: Microchip Technology
Catalog
10/100 Base-T/TX Ethernet Controller with 16 Bit Interface
Key Features
• **•**Optimized for high performance applications
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• **•**Efficient architecture with low CPU overhead
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• **•**Easily interfaces to most 16-bit embedded CPU's
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• **•**1.8V to 3.3V variable voltage I/O accommodates wide range of I/O signaling without voltage level shifters
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• **•**Integrated PHY with HP Auto-MDIX support
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• **•**Integrated checksum offload engine helps reduce CPU load
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• **•**Low pin count and small body size package for small form factor system designs
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• **•**16-bit interface with fast bus cycle times
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• **•**Burst-mode read support
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• **•**Internal buffer memory can store over 200 packets
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• **•**Automatic PAUSE and back-pressure flow control
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• **•**Supports Slave-DMA
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• **•**Interrupt Pin with Programmable Hold-off timer
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• **•**Reduces system cost and increases design flexibility
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• **•**SRAM-like interface easily interfaces to most Embedded CPU's or SoC's
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• **•**Numerous power management modes
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• **•**Wake on LAN
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• **•**Magic packet wakeup
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• **•**Wakeup indicator event signal
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• **•**Link Status Change
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• **•**Fully compliant with IEEE 802.3/802.3u standards
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• **•**Integrated Ethernet MAC and PHY
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• **•**10BASE-T and 100BASE-TX support
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• **•**Full- and Half-duplex support
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• **•**Full-duplex flow control
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• **•**Backpressure for half-duplex flow control
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• **•**Preamble generation and removal
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• **•**Automatic 32-bit CRC generation and checking
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• **•**Automatic payload padding and pad removal
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• **•**Loop-back modes
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• **•**One 48-bit perfect address
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• **•**64 hash-filtered multicast addresses
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• **•**Pass all multicast
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• **•**Promiscuous mode
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• **•**Inverse filtering
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• **•**Pass all incoming with status report
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• **•**Disable reception of broadcast packets
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• **•**Supports HP Auto-MDIX
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• **•**Auto-negotiation
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• **•**Supports energy-detect power down
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• **•**Simple, SRAM-like interface
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• **•**16-bit data bus
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• **•**16Kbyte FIFO with flexible TX/RX allocation
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• **•**One configurable host interrupt
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• **•**Small form factor, 56-pin QFN RoHS Compliant package
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• **•**Integrated 1.8V regulator
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• **•**Integrated checksum offload engine
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• **•**Mixed endian support
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• **•**General Purpose Timer
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• **•**Optional EEPROM interface
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• **•**Support for 3 status LEDs multiplexed with Programmable GPIO signals
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• **•**Single 3.3V Power Supply with Variable Voltage I/O
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• **•**Commercial and Industrial Temperature Support
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• Applications:* Cable, satellite, and IP set-top boxes
• * Digital video recorders and DVD recorder/players
• * Digital TV
• * Digital media clients/servers and home gateways
• * Video-over IP solutions, IP PBX & video phones
• * Wireless routers & access points
• * High-end audio distribution systems
Description
AI
The LAN9221/LAN9221i is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9221/LAN9221i has been specifically designed to provide high performance and throughput for 16-bit applications. The LAN9221/LAN9221i is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX. The variable voltage I/O signals of the LAN9221/LAN9221i accommodate lower voltage I/O signaling without the need for voltage level shifters.
The LAN9221/LAN9221i includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9221/LAN9221i also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9221/LAN9221i memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity.
The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the [93AA46AE48](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset.
Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.
