Microchip Technology

The LAN8840 is a low-power, single-port triple-speed (10BASE-T/100BASE-TX/1000BASE-T) Ethernet physical layer transceiver (PHY) that is optimized for precision process timing. The device enables highly accurate synchronization of motors, valves, actuators and sensors over standard CAT-5, CAT-5e and CAT-6, unshielded twisted pair (UTP) cables. The LAN8840 supports industry-standard RGMII (Reduced Gigabit Media Independent Interface) providing chip-to-chip connection to a host device with an integrated Gigabit Ethernet MAC. The LAN8840 provides high-accuracy IEEE 1588-2008 (v2) timestamping to support Microchip Time-Sensitive Network (TSN) Ethernet switches, as well as, SoCs and FPGAs supporting the RGMII interface. The LAN8840 also provides Synchronous Ethernet (SyncE), TSN frame preemption support and multiple power saving features. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN8841 is a low-power, single-port triple-speed (10BASE-T/100BASE-TX/1000BASE-T) Ethernet physical layer transceiver (PHY) that is optimized for precision process timing. The device enables highly accurate synchronization of motors, valves, actuators and sensors over standard CAT-5, CAT-5e and CAT-6, unshielded twisted pair (UTP) cables. The LAN8841 provides RGMII (Reduced Gigabit Media Independent Interface) and GMII/MII (Gigabit Media Independent Interface/Media Independent Interface) for connection to Ethernet MACs in processors and switches for data transfer at 1000Mbps or 10/100Mbps. The LAN8841 provides high-accuracy IEEE 1588-2008 (v2) timestamping to support Microchip Time-Sensitive Network (TSN) Ethernet switches, as well as, SoCs and FPGAs supporting the RGMII interface. The LAN8841 also provides Synchronous Ethernet (SyncE), TSN frame preemption support and multiple power saving features. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN9116 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9116 has been architected to provide the best price-performance ratio for any 32-bit application with medium-high performance requirements. The LAN9116 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant. The LAN9116 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit and 32-bit microprocessors and microcontrollers. The LAN9116 includes large transmit and receive data FIFOs to accommodate bandwidth-intensive and high latency applications. In addition, the LAN9116 memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity. The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the [93AA46AE48](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN9117 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9117 has been specifically architected to provide the highest performance possible for any 16-bit application. The LAN9117 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant. The LAN9117 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors exposing a 16-bit external bus. The LAN9117 includes large transmit and receive data FIFOs with a high-speed host bus interface to accommodate high bandwidth, high-latency applications. In addition, the LAN9117 memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity. The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the [93AA46AE48](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The Microchip LAN91C111 is designed to facilitate the implementation of a third generation of Fast Ethernet connectivity solutions for embedded applications. For this third generation of products, flexibility and integration dominate the design requirements. The LAN91C111 is a mixed signal Analog/Digital device that implements the MAC and PHY portion of the CSMA/CD protocol at 10 and 100 Mbps. The design will also minimize data throughput constraints utilizing a 32-bit, 16-bit or 8-bit bus Host interface in embedded applications. The total internal memory FIFO buffer size is 8 Kbytes, which is the total chip storage for transmit and receive operations. The Microchip LAN91C111 is software compatible with the LAN9000 family of products. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN91C96 is a VLSI Ethernet Controller that combines Local Bus, PCMCIA, and Motorola 68000 bus interfaces in one chip. LAN91C96 integrates all MAC and physical layer functions, as well as the packet RAM, needed to implement a high performance 10BASE-T (twisted pair) node. For 10BASE5 (thick coax), 10BASE2 (thin coax), and 10BASE-F (fiber) implementations, the LAN91C96 interfaces to external transceivers via the provided AUI port. Only one additional IC is required for most applications. The LAN91C96 comes with Full Duplex Switched Ethernet (FDSWE) support allowing the controller to provide much higher throughput. 6K bytes of RAM is provided to support enhanced throughput and compensate for any increased system service latencies. The controller implements multiple advanced power-down modes including Magic Packet to conserve power and operate more efficiently. The LAN91C96 can directly interface with the Local Bus, PCMCIA, and 68000 buses and deliver no-wait-state operation. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The LAN9210 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9210 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX. The LAN9210 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with a 16-bit external bus. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9210 also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9210 memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity. The 93AA46AE48 EEPROM device from Microchip comes with a factory programmed, globally unique EUI-48™ MAC Address. This Ethernet controller will automatically detect and load the EUI-48™ node address from the [**93AA46AE48**](https://www.microchip.com/en-us/product/93aa46ae48) EEPROM at start-up or reset. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.