Zenode.ai Logo
Beta

Catalog

Key Features

* 2 LVCMOS Outputs
* Input/Output Frequency: 1MHz to 150MHz
* Supports LVCMOS or Sine Wave Input Clock
* Output Enable (OE) only controls CLK0
* CLK1 is always on
* Extremely low additive Jitter
* 8 mA Output Drive Strength
* Low Current Consumption
* Single 1.8V, 2.5V, or 3.3V, ±10% Power Supply
* Operating Temperature Range: 0°C to 70°C (Commercial), 0 -40°C to 85°C (Industrial)
* Available in DFN-6L GREEN/RoHS Compliant
Packages

Description

AI
The PL133-97 is an advanced fanout buffer design for high performance, low-power, small form factor applications. The PL133-97 accepts a reference clock input from DC to 150 MHz and provides 9 outputs of the same frequency.The PL133-97 is offered in a QFN-16L 3mm x 3mm package and it offers the best phase noise, additive jitter performance, and lowest power consumption of any comparable IC. The PL133-97 outputs can be disabled to a high impedance (tri-state) by pulling low the OE pin. When the OE pin is high, the outputs are enabled and follow the REF input signal. When the OE pin is left open, a pull-up resistor on the chip will default the OE pin to logic 1 so the outputs are enabled.