Specification	V62/04703-01YE

Count Rate	60 MHz
Direction	Up
Logic Type	Counter, Decade
Mounting Type	Surface Mount
Number of Bits per Element	5
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Package / Case	16-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
Reset	Asynchronous
Supplier Device Package	16-TSSOP
Trigger Type	Negative, Positive
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

CD74HC4017-EP Series

High Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

Part	Package / Case	Package / Case [x]	Package / Case [y]	Number of Bits per Element	Count Rate	Reset	Number of Elements	Voltage - Supply [Min]	Voltage - Supply [Max]	Supplier Device Package	Mounting Type	Direction	Logic Type	Operating Temperature [Max]	Operating Temperature [Min]	Trigger Type	Timing	Operating Temperature [Min]	Operating Temperature [Max]	Package / Case	Package / Case	Qualification	Grade
Texas Instruments CD74HC4017M	16-SOIC	0.154 in	3.9 mm	10	35 MHz	Asynchronous	1	2 V	6 V	16-SOIC	Surface Mount	Up	Counter Decade	125 °C	-55 °C	Negative Positive	Synchronous
Texas Instruments V62/04703-01YE	16-TSSOP	0.173 in	4.4 mm	5	60 MHz	Asynchronous	1	2 V	6 V	16-TSSOP	Surface Mount	Up	Counter Decade			Negative Positive		-40 °C	125 °C
Texas Instruments CD74HC4017E	16-DIP			10	35 MHz	Asynchronous	1	2 V	6 V	16-PDIP	Through Hole	Up	Counter Decade	125 °C	-55 °C	Negative Positive	Synchronous			0.3 in	7.62 mm
Texas Instruments CD74HC4017MT	16-SOIC	0.154 in	3.9 mm	10	35 MHz	Asynchronous	1	2 V	6 V	16-SOIC	Surface Mount	Up	Counter Decade	125 °C	-55 °C	Negative Positive	Synchronous
Texas Instruments CD74HC4017PWR	16-TSSOP	0.173 in	4.4 mm	10	35 MHz	Asynchronous	1	2 V	6 V	16-TSSOP	Surface Mount	Up	Counter Decade	125 °C	-55 °C	Negative Positive	Synchronous
Texas Instruments CD74HC4017EG4	16-DIP			10	35 MHz	Asynchronous	1	2 V	6 V	16-PDIP	Through Hole	Up	Counter Decade	125 °C	-55 °C	Negative Positive	Synchronous			0.3 in	7.62 mm
Texas Instruments CD74HC4017QPWRQ1	16-TSSOP	0.173 in	4.4 mm	10	35 MHz	Asynchronous	1	2 V	6 V	16-TSSOP	Surface Mount	Up	Counter Decade			Negative Positive	Synchronous	-40 °C	125 °C			AEC-Q100	Automotive
Texas Instruments CD74HC4017MTE4	16-SOIC	0.154 in	3.9 mm	10	35 MHz	Asynchronous	1	2 V	6 V	16-SOIC	Surface Mount	Up	Counter Decade	125 °C	-55 °C	Negative Positive	Synchronous
Texas Instruments CD74HC4017QM96Q1	16-SOIC	0.154 in	3.9 mm	10	35 MHz	Asynchronous	1	2 V	6 V	16-SOIC	Surface Mount	Up	Counter Decade			Negative Positive	Synchronous	-40 °C	125 °C			AEC-Q100	Automotive
Texas Instruments V62/04703-01XE	16-SOIC	0.154 in	3.9 mm	5	60 MHz	Asynchronous	1	2 V	6 V	16-SOIC	Surface Mount	Up	Counter Decade			Negative Positive		-40 °C	125 °C

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tape & Reel (TR)	2000	$ 1.06
Texas Instruments	LARGE T&R	1	$ 2.19
		100	$ 1.81
		250	$ 1.30
		1000	$ 0.98

Description

General part information

CD74HC4017-EP Series

The CD74HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each of the decoded outputs normally is low and sequentially goes high on the low-to-high transition clock period of the ten-clock-period cycle. The carry (TC) output transitions low to high after output 9 goes from high to low and can be used in conjunction with the clock enable (CE)\ input to cascade several stages. CE\ disables counting when in the high state. A master reset (MR) input also is provided that, when taken high, sets all the decoded outputs, except output 0, to low.

The device can drive up to ten low-power Schottky equivalent loads.

Documents

Technical documentation and resources

V62/04703-01YE

Deep-Dive with AI

V62/04703-01YE

Deep-Dive with AI

Technical Specifications

CD74HC4017-EP Series

Pricing

Description

CD74HC4017-EP Series

Documents

Signal Switch Data Book (Rev. A)

SN54/74HCT CMOS Logic Family Applications and Restrictions

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

TI IBIS File Creation, Validation, and Distribution Processes

Implications of Slow or Floating CMOS Inputs (Rev. E)

Input and Output Characteristics of Digital Integrated Circuits

Live Insertion

CD74HC4017-EP datasheet

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Logic Guide (Rev. AB)

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

CMOS Power Consumption and CPD Calculation (Rev. B)

LOGIC Pocket Data Book (Rev. B)

Designing With Logic (Rev. C)

CD74HC4017-EP Series