
CD74HC4017PWR
ActiveHIGH SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS
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CD74HC4017PWR
ActiveHIGH SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS
Technical Specifications
Parameters and characteristics for this part
| Specification | CD74HC4017PWR |
|---|---|
| Count Rate | 35 MHz |
| Direction | Up |
| Logic Type | Counter, Decade |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 10 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 16-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Reset | Asynchronous |
| Supplier Device Package | 16-TSSOP |
| Timing | Synchronous |
| Trigger Type | Negative, Positive |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.58 | |
| 10 | $ 0.49 | |||
| 25 | $ 0.46 | |||
| 100 | $ 0.37 | |||
| 250 | $ 0.34 | |||
| 500 | $ 0.29 | |||
| 1000 | $ 0.22 | |||
| Digi-Reel® | 1 | $ 0.58 | ||
| 10 | $ 0.49 | |||
| 25 | $ 0.46 | |||
| 100 | $ 0.37 | |||
| 250 | $ 0.34 | |||
| 500 | $ 0.29 | |||
| 1000 | $ 0.22 | |||
| Tape & Reel (TR) | 2000 | $ 0.20 | ||
| 6000 | $ 0.19 | |||
| 10000 | $ 0.18 | |||
| 50000 | $ 0.16 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.51 | |
| 100 | $ 0.35 | |||
| 250 | $ 0.27 | |||
| 1000 | $ 0.18 | |||
Description
General part information
CD74HC4017-EP Series
The CD74HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each of the decoded outputs normally is low and sequentially goes high on the low-to-high transition clock period of the ten-clock-period cycle. The carry (TC) output transitions low to high after output 9 goes from high to low and can be used in conjunction with the clock enable (CE)\ input to cascade several stages. CE\ disables counting when in the high state. A master reset (MR) input also is provided that, when taken high, sets all the decoded outputs, except output 0, to low.
The device can drive up to ten low-power Schottky equivalent loads.
The CD74HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each of the decoded outputs normally is low and sequentially goes high on the low-to-high transition clock period of the ten-clock-period cycle. The carry (TC) output transitions low to high after output 9 goes from high to low and can be used in conjunction with the clock enable (CE)\ input to cascade several stages. CE\ disables counting when in the high state. A master reset (MR) input also is provided that, when taken high, sets all the decoded outputs, except output 0, to low.
Documents
Technical documentation and resources