Zenode.ai Logo
Beta
X2SON (DPW)
Integrated Circuits (ICs)

SN74AUP1G80DPWR

Active
Texas Instruments

LOW-POWER SINGLE POSTITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

Deep-Dive with AI

Search across all available documentation for this part.

X2SON (DPW)
Integrated Circuits (ICs)

SN74AUP1G80DPWR

Active
Texas Instruments

LOW-POWER SINGLE POSTITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74AUP1G80DPWR
Clock Frequency260 MHz
Current - Output High, Low [custom]4 mA
Current - Output High, Low [custom]4 mA
FunctionStandard
Input Capacitance1.5 pF
Max Propagation Delay @ V, Max CL6.4 ns
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type1.81 mOhm
Package / Case4-XFDFN Exposed Pad
Supplier Device Package5-X2SON (0.8x0.8)
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]0.8 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.39
10$ 0.34
25$ 0.31
100$ 0.25
250$ 0.23
500$ 0.20
1000$ 0.16
Digi-Reel® 1$ 0.39
10$ 0.34
25$ 0.31
100$ 0.25
250$ 0.23
500$ 0.20
1000$ 0.16
Tape & Reel (TR) 3000$ 0.16
Texas InstrumentsLARGE T&R 1$ 0.30
100$ 0.20
250$ 0.16
1000$ 0.10

Description

General part information

SN74AUP1G80 Series

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family assures a low static- and dynamic-power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in increased battery life (seeAUP – The Lowest-Power Family). This product also maintains excellent signal integrity (seeExcellent Signal Integrity).

This is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup time requirement, the data is transferred to theQoutput on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.