Specification	SN74LVC574ADW

Clock Frequency	150 MHz
Current - Output High, Low	24 mA
Current - Quiescent (Iq)	10 µA
Function	Standard
Input Capacitance	4 pF
Max Propagation Delay @ V, Max CL	6.8 ns
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	20-SOIC
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	20-SOIC
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74LVC574A-Q1 Series

Automotive Catalog Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs

Part	Type	Function	Operating Temperature [Min]	Operating Temperature [Max]	Number of Bits per Element	Max Propagation Delay @ V, Max CL	Trigger Type	Supplier Device Package	Clock Frequency	Current - Quiescent (Iq)	Output Type	Number of Elements	Current - Output High, Low	Package / Case	Package / Case	Package / Case	Input Capacitance	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Package / Case [y]	Package / Case [x]	Package / Case [y]	Qualification	Grade
Texas Instruments SN74LVC574AN	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-PDIP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-DIP	7.62 mm	0.3 in	4 pF	1.65 V	3.6 V	Through Hole
Texas Instruments SN74LVC574AQPWREP	D-Type	Standard	-40 °C	125 °C	8	7 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	2 V	3.6 V	Surface Mount	4.4 mm	0.173 in
Texas Instruments SN74LVC574ADW	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-SOIC	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-SOIC			4 pF	1.65 V	3.6 V	Surface Mount	0.295 in		7.5 mm
Texas Instruments CLVC574AQDWRG4Q1	D-Type	Standard	-40 °C	125 °C	8	7 ns	Positive Edge	20-SOIC	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-SOIC			4 pF	2 V	3.6 V	Surface Mount	0.295 in		7.5 mm	AEC-Q100	Automotive
Texas Instruments SN74LVC574APWT	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	1.65 V	3.6 V	Surface Mount	4.4 mm	0.173 in
Texas Instruments SN74LVC574ADWRE4	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-SOIC	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-SOIC			4 pF	1.65 V	3.6 V	Surface Mount	0.295 in		7.5 mm
Texas Instruments SN74LVC574ADWR	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-SOIC	150 MHz	1.5 µA	Non-Inverted Tri-State	1	24 mA	20-SOIC			4 pF	1.65 V	3.6 V	Surface Mount	0.295 in		7.5 mm
Texas Instruments SN74LVC574APWRG4	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	1.65 V	3.6 V	Surface Mount	4.4 mm	0.173 in
Texas Instruments SN74LVC574AQPWRQ1	D-Type	Standard	-40 °C	125 °C	8	7 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	2 V	3.6 V	Surface Mount	4.4 mm	0.173 in		AEC-Q100	Automotive
Texas Instruments CLVC574AQPWRG4Q1	D-Type	Standard	-40 °C	125 °C	8	7 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	2 V	3.6 V	Surface Mount	4.4 mm	0.173 in		AEC-Q100	Automotive

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	25	$ 1.28
		125	$ 1.05
		250	$ 0.98
		625	$ 0.87
		1250	$ 0.68
		2500	$ 0.64
Texas Instruments	TUBE	1	$ 1.11
		100	$ 0.86
		250	$ 0.63
		1000	$ 0.45

Description

General part information

SN74LVC574A-Q1 Series

The SN54LVC574A octal edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCCoperation, and the SN74LVC574A octal edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCCoperation.

These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels at the data (D) inputs.

Documents

Technical documentation and resources

SN74LVC574ADW

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SN74LVC574ADW

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Technical Specifications

SN74LVC574A-Q1 Series

Pricing

Description

SN74LVC574A-Q1 Series

Documents

Implications of Slow or Floating CMOS Inputs (Rev. E)

Signal Switch Data Book (Rev. A)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

CMOS Power Consumption and CPD Calculation (Rev. B)

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

TI IBIS File Creation, Validation, and Distribution Processes

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

SN54LVC574A, SN74LVC574A datasheet (Rev. R)

Understanding Advanced Bus-Interface Products Design Guide

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Design Summary for WCSP Little Logic (Rev. B)

LOGIC Pocket Data Book (Rev. B)

Logic Guide (Rev. AB)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

LVC Characterization Information

Live Insertion

Input and Output Characteristics of Digital Integrated Circuits

How to Select Little Logic (Rev. A)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Power-Up Behavior of Clocked Devices (Rev. B)

Texas Instruments Little Logic Application Report

Little Logic Guide 2018 (Rev. G)

Standard Linear & Logic for PCs, Servers & Motherboards

Selecting the Right Level Translation Solution (Rev. A)

Low-Voltage Logic (LVC) Designer's Guide

SN74LVC574A-Q1 Series