Integrated Circuits (ICs)

SN74LVC574ADWRE4

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Texas Instruments

IC FF D-TYPE SNGL 8BIT 20SOIC

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Integrated Circuits (ICs)

SN74LVC574ADWRE4

Unknown

Texas Instruments

IC FF D-TYPE SNGL 8BIT 20SOIC

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DocumentsDatasheet

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74LVC574ADWRE4

Clock Frequency	150 MHz
Current - Output High, Low	24 mA
Current - Quiescent (Iq)	10 µA
Function	Standard
Input Capacitance	4 pF
Max Propagation Delay @ V, Max CL	6.8 ns
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	20-SOIC
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	20-SOIC
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74LVC574A-Q1 Series

Automotive Catalog Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs

Part	Type	Function	Operating Temperature [Min]	Operating Temperature [Max]	Number of Bits per Element	Max Propagation Delay @ V, Max CL	Trigger Type	Supplier Device Package	Clock Frequency	Current - Quiescent (Iq)	Output Type	Number of Elements	Current - Output High, Low	Package / Case	Package / Case	Package / Case	Input Capacitance	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Package / Case [y]	Package / Case [x]	Package / Case [y]	Qualification	Grade
Texas Instruments SN74LVC574AN	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-PDIP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-DIP	7.62 mm	0.3 in	4 pF	1.65 V	3.6 V	Through Hole
Texas Instruments SN74LVC574AQPWREP	D-Type	Standard	-40 °C	125 °C	8	7 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	2 V	3.6 V	Surface Mount	4.4 mm	0.173 in
Texas Instruments SN74LVC574ADW	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-SOIC	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-SOIC			4 pF	1.65 V	3.6 V	Surface Mount	0.295 in		7.5 mm
Texas Instruments CLVC574AQDWRG4Q1	D-Type	Standard	-40 °C	125 °C	8	7 ns	Positive Edge	20-SOIC	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-SOIC			4 pF	2 V	3.6 V	Surface Mount	0.295 in		7.5 mm	AEC-Q100	Automotive
Texas Instruments SN74LVC574APWT	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	1.65 V	3.6 V	Surface Mount	4.4 mm	0.173 in
Texas Instruments SN74LVC574ADWRE4	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-SOIC	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-SOIC			4 pF	1.65 V	3.6 V	Surface Mount	0.295 in		7.5 mm
Texas Instruments SN74LVC574ADWR	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-SOIC	150 MHz	1.5 µA	Non-Inverted Tri-State	1	24 mA	20-SOIC			4 pF	1.65 V	3.6 V	Surface Mount	0.295 in		7.5 mm
Texas Instruments SN74LVC574APWRG4	D-Type	Standard	-40 °C	125 °C	8	6.8 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	1.65 V	3.6 V	Surface Mount	4.4 mm	0.173 in
Texas Instruments SN74LVC574AQPWRQ1	D-Type	Standard	-40 °C	125 °C	8	7 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	2 V	3.6 V	Surface Mount	4.4 mm	0.173 in		AEC-Q100	Automotive
Texas Instruments CLVC574AQPWRG4Q1	D-Type	Standard	-40 °C	125 °C	8	7 ns	Positive Edge	20-TSSOP	150 MHz	10 µA	Non-Inverted Tri-State	1	24 mA	20-TSSOP			4 pF	2 V	3.6 V	Surface Mount	4.4 mm	0.173 in		AEC-Q100	Automotive

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

SN74LVC574A-Q1 Series

The SN54LVC574A octal edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCCoperation, and the SN74LVC574A octal edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCCoperation.

These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels at the data (D) inputs.

Documents

Technical documentation and resources