Specification	SNJ54HC138J

Circuit	1 x 3:8
Current - Output High, Low [custom]	5.2 mA
Current - Output High, Low [custom]	5.2 mA
Independent Circuits	1
Mounting Type	Through Hole
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Package / Case	7.62 mm, 0.3 in
Package / Case	16-CDIP
Supplier Device Package	16-CDIP
Type	Decoder/Demultiplexer
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V
Voltage Supply Source	Single Supply

SN54HC138 Series

3-Line To 8-Line Decoders/Demultiplexers

Part	Mounting Type	Independent Circuits	Voltage Supply Source	Operating Temperature [Min]	Operating Temperature [Max]	Circuit	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Package / Case
Texas Instruments 8406201FA	Surface Mount	1	Single Supply	-55 °C	125 °C	1 x 3:8	2 V	6 V	16-CFlatPack	Decoder/Demultiplexer	5.2 mA	5.2 mA
Texas Instruments JM38510/65802B2A	Surface Mount	1	Single Supply	-55 °C	125 °C	1 x 3:8	2 V	6 V	20-CLCC	Decoder/Demultiplexer	5.2 mA	5.2 mA	20-LCCC (8.89x8.89)
Texas Instruments SNJ54HC138J	Through Hole	1	Single Supply	-55 °C	125 °C	1 x 3:8	2 V	6 V	16-CDIP	Decoder/Demultiplexer	5.2 mA	5.2 mA	16-CDIP	0.3 in 7.62 mm
Texas Instruments SNJ54HC138FK	Surface Mount	1	Single Supply	-55 °C	125 °C	1 x 3:8	2 V	6 V	20-CLCC	Decoder/Demultiplexer	5.2 mA	5.2 mA	20-LCCC (8.89x8.89)

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Texas Instruments	TUBE	1	$ 14.08
		100	$ 12.30
		250	$ 9.48
		1000	$ 8.48

Description

General part information

SN54HC138 Series

The SNx4HC138 devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories using a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

Documents

Technical documentation and resources

SNJ54HC138J

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SNJ54HC138J

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Technical Specifications

SN54HC138 Series

Pricing

Description

SN54HC138 Series

Documents

Signal Switch Data Book (Rev. A)

Designing With Logic (Rev. C)

Implications of Slow or Floating CMOS Inputs (Rev. E)

TI IBIS File Creation, Validation, and Distribution Processes

Input and Output Characteristics of Digital Integrated Circuits

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

LOGIC Pocket Data Book (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Logic Guide (Rev. AB)

SNx4HC138 3-Line To 8-Line Decoders/Demultiplexers datasheet (Rev. G)

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

CMOS Power Consumption and CPD Calculation (Rev. B)

SN54/74HCT CMOS Logic Family Applications and Restrictions

Live Insertion

SN54HC138 Series