
Catalog
3-Line To 8-Line Decoders/Demultiplexers
Key Features
• Targeted Specifically for High-Speed Memory Decoders and Data-Transmission SystemsWide Operating Voltage Range (2 V to 6 V)Outputs Can Drive Up To 10 LSTTL LoadsLow Power Consumption, 80-µA Maximum ICCTypical tpd= 15 ns±4-mA Output Drive at 5 VLow Input Current of 1-µA MaximumActive Low Outputs ( Selected Output is Low)Incorporate Three Enable Inputs to Simplify Cascading or Data ReceptionTargeted Specifically for High-Speed Memory Decoders and Data-Transmission SystemsWide Operating Voltage Range (2 V to 6 V)Outputs Can Drive Up To 10 LSTTL LoadsLow Power Consumption, 80-µA Maximum ICCTypical tpd= 15 ns±4-mA Output Drive at 5 VLow Input Current of 1-µA MaximumActive Low Outputs ( Selected Output is Low)Incorporate Three Enable Inputs to Simplify Cascading or Data Reception
Description
AI
The SNx4HC138 devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories using a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
The SNx4HC138 devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories using a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.