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16 SOIC
Integrated Circuits (ICs)

SN74HC253QDREP

Active
Texas Instruments

ENHANCED PRODUCT DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS

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Search across all available documentation for this part.

DocumentsSN54/74HCT CMOS Logic Family Applications and RestrictionsDesigning With Logic (Rev. C)+12
16 SOIC
Integrated Circuits (ICs)

SN74HC253QDREP

Active
Texas Instruments

ENHANCED PRODUCT DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsSN54/74HCT CMOS Logic Family Applications and RestrictionsDesigning With Logic (Rev. C)+12

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74HC253QDREP
Circuit [custom]2
Circuit [custom]4:1
Current - Output High, Low [custom]7.8 mA
Current - Output High, Low [custom]7.8 mA
Independent Circuits1
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Supplier Device Package16-SOIC
TypeMultiplexer
Voltage - Supply [Max]6 V
Voltage - Supply [Min]2 V
Voltage Supply SourceSingle Supply

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 2.39
10$ 2.15
25$ 2.03
100$ 1.73
250$ 1.62
500$ 1.42
1000$ 1.18
Digi-Reel® 1$ 2.39
10$ 2.15
25$ 2.03
100$ 1.73
250$ 1.62
500$ 1.42
1000$ 1.18
Tape & Reel (TR) 2500$ 1.09
5000$ 1.05
Texas InstrumentsLARGE T&R 1$ 2.07
100$ 1.71
250$ 1.23
1000$ 0.92

Description

General part information

SN74HC253-Q1 Series

Each data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.

The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (in the high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable (OE)\ input. The outputs are disabled when their respective OE\ is high.

Each data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.