Zenode.ai Logo
Beta
SSOP (DB)
Integrated Circuits (ICs)

SN74HC253DBR

Active
Texas Instruments

DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS

Deep-Dive with AI

Search across all available documentation for this part.

SSOP (DB)
Integrated Circuits (ICs)

SN74HC253DBR

Active
Texas Instruments

DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74HC253DBR
Circuit [custom]2
Circuit [custom]4:1
Current - Output High, Low [custom]7.8 mA
Current - Output High, Low [custom]7.8 mA
Independent Circuits1
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case16-SSOP
Package / Case [custom]0.209 in
Package / Case [custom]5.3 mm
Supplier Device Package16-SSOP
TypeMultiplexer
Voltage - Supply [Max]6 V
Voltage - Supply [Min]2 V
Voltage Supply SourceSingle Supply

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.60
10$ 0.51
25$ 0.48
100$ 0.38
250$ 0.36
500$ 0.30
1000$ 0.23
Digi-Reel® 1$ 0.60
10$ 0.51
25$ 0.48
100$ 0.38
250$ 0.36
500$ 0.30
1000$ 0.23
Tape & Reel (TR) 2000$ 0.20
6000$ 0.19
10000$ 0.18
50000$ 0.16
Texas InstrumentsLARGE T&R 1$ 0.42
100$ 0.28
250$ 0.22
1000$ 0.14

Description

General part information

SN74HC253-Q1 Series

Each data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.

The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (in the high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable (OE)\ input. The outputs are disabled when their respective OE\ is high.

Each data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.