Integrated Circuits (ICs)

SN74LV574APW

Obsolete

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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Search across all available documentation for this part.

DocumentsSN74LV574A Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet (Rev. K)Power-Up Behavior of Clocked Devices (Rev. B)

Integrated Circuits (ICs)

SN74LV574APW

Obsolete

Texas Instruments

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsSN74LV574A Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet (Rev. K)Power-Up Behavior of Clocked Devices (Rev. B)

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74LV574APW

Current - Output High, Low [custom]	16 mA
Current - Output High, Low [custom]	16 mA
Current - Quiescent (Iq)	20 çA
Function	Standard
Input Capacitance	1.8 pF
Max Propagation Delay @ V, Max CL	10.6 ns
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	20-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
Supplier Device Package	20-TSSOP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	2 V

SN74LV574A Series

Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Type	Input Capacitance	Number of Elements	Package / Case	Package / Case [y]	Package / Case [y]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Function	Output Type	Max Propagation Delay @ V, Max CL	Trigger Type	Number of Bits per Element	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Current - Quiescent (Iq)	Clock Frequency	Package / Case [x]
Texas Instruments SN74LV574ADW	85 °C	-40 °C	20-SOIC	D-Type	1.8 pF	1	20-SOIC	0.295 in	7.5 mm	16 mA	16 mA	Standard	Non-Inverted Tri-State	10.6 ns	Positive Edge	8	Surface Mount	5.5 V	2 V	20 çA
Texas Instruments SN74LV574ADBR	85 °C	-40 °C	20-SSOP	D-Type	1.8 pF	1	20-SSOP			16 mA	16 mA	Standard	Non-Inverted Tri-State	10.6 ns	Positive Edge	8	Surface Mount	5.5 V	2 V	20 çA
Texas Instruments SN74LV574AZQNR	85 °C	-40 °C	20-BGA MICROSTAR JUNIOR (4x3)	D-Type	1.8 pF	1	20-VFBGA			16 mA	16 mA	Standard	Non-Inverted Tri-State	10.6 ns	Positive Edge	8	Surface Mount	5.5 V	2 V	20 çA
Texas Instruments SN74LV574ADWR	85 °C	-40 °C	20-SOIC	D-Type	1.8 pF	1	20-SOIC	0.295 in	7.5 mm	16 mA	16 mA	Standard	Non-Inverted Tri-State	10.6 ns	Positive Edge	8	Surface Mount	5.5 V	2 V	20 çA
Texas Instruments SN74LV574AGQNR	85 °C	-40 °C	20-BGA MICROSTAR JUNIOR (4x3)	D-Type	1.8 pF	1	20-VFBGA			16 mA	16 mA	Standard	Non-Inverted Tri-State	5.7 ns	Positive Edge	8	Surface Mount	5.5 V	2 V	20 çA	205 MHz
Texas Instruments SN74LV574APW	85 °C	-40 °C	20-TSSOP	D-Type	1.8 pF	1	20-TSSOP	4.4 mm		16 mA	16 mA	Standard	Non-Inverted Tri-State	10.6 ns	Positive Edge	8	Surface Mount	5.5 V	2 V	20 çA		0.173 in
Texas Instruments SN74LV574ARGYR	85 °C	-40 °C	20-VQFN (3.5x4.5)	D-Type	1.8 pF	1	20-VFQFN Exposed Pad			16 mA	16 mA	Standard	Non-Inverted Tri-State	10.6 ns	Positive Edge	8	Surface Mount	5.5 V	2 V	20 çA
Texas Instruments SN74LV574ADGVR	85 °C	-40 °C	20-TVSOP	D-Type	1.8 pF	1	20-TFSOP	0.173 in	4.4 mm	16 mA	16 mA	Standard	Non-Inverted Tri-State	5.7 ns	Positive Edge	8	Surface Mount	5.5 V	2 V	20 çA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 1.30
		10	$ 1.17
		70	$ 1.11
		140	$ 0.91
Texas Instruments	TUBE	1	$ 0.97
		100	$ 0.74
		250	$ 0.55
		1000	$ 0.39

Description

General part information

SN74LV574A Series

The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation.

These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

Documents

Technical documentation and resources

SN74LV574A Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet (Rev. K)

Data sheet

Power-Up Behavior of Clocked Devices (Rev. B)

Application note