
SN74LV574A Series
Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs
Manufacturer: Texas Instruments
Catalog
Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs
Key Features
• 2-V to 5.5-V VCCoperationMaximum tpdof 7.1 ns at 5 VTypical VOLP(output ground bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(output VOHundershoot) > 2.3 V at VCC= 3.3 V, TA= 25°CSupport mixed-mode voltage operation on all portsIoffsupports partial-power-down mode operationLatch-up performance exceeds 250 mA per JESD 172-V to 5.5-V VCCoperationMaximum tpdof 7.1 ns at 5 VTypical VOLP(output ground bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(output VOHundershoot) > 2.3 V at VCC= 3.3 V, TA= 25°CSupport mixed-mode voltage operation on all portsIoffsupports partial-power-down mode operationLatch-up performance exceeds 250 mA per JESD 17
Description
AI
The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation.
These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2 V to 5.5 V VCCoperation.
These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.