Integrated Circuits (ICs)

TMS32C6202BGNZA250

Obsolete

C62X FIXED POINT DSP- UP TO 300MHZ, 384KB

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Search across all available documentation for this part.

DocumentsTMS320C6000 u-Law and a-Law Companding with Software or the McBSP TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E)+59

Integrated Circuits (ICs)

TMS32C6202BGNZA250

Obsolete

Texas Instruments

C62X FIXED POINT DSP- UP TO 300MHZ, 384KB

Deep-Dive with AI

DocumentsTMS320C6000 u-Law and a-Law Companding with Software or the McBSP TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E)+59

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	TMS32C6202BGNZA250

Clock Rate	250 MHz
Interface	McBSP
Mounting Type	Surface Mount
Non-Volatile Memory	External
On-Chip RAM	384 kB
Operating Temperature [Max]	105 °C
Operating Temperature [Min]	-40 °C
Package / Case	352-BBGA, FCBGA
Supplier Device Package	352-FCBGA (27x27)
Type	Fixed Point
Voltage - Core	1.5 V
Voltage - I/O	3.3 V

TMS320C6202B Series

Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC

Part	On-Chip RAM	Operating Temperature [Max]	Operating Temperature [Min]	Type	Voltage - Core	Interface	Non-Volatile Memory	Mounting Type	Voltage - I/O	Package / Case	Supplier Device Package	Clock Rate
Texas Instruments TMS32C6211BZFNA150	72 kB	105 °C	-40 °C	Fixed Point	1.8 V	Host Interface McBSP	External	Surface Mount	3.3 V	256-BGA	256-BGA (27x27)
Texas Instruments TMS32C6414DGLZ7E3	1.03 MB	90 °C	0 °C	Fixed Point	1.4 V	Host Interface McBSP	External	Surface Mount	3.3 V	532-BFBGA FCBGA	532-FCBGA (23x23)	720 MHz
Texas Instruments TMS32C6202BGNZA250	384 kB	105 °C	-40 °C	Fixed Point	1.5 V	McBSP	External	Surface Mount	3.3 V	352-BBGA FCBGA	352-FCBGA (27x27)	250 MHz
Texas Instruments TMS32C6416EZLZ5E0	1.03 MB	90 °C	0 °C	Fixed Point	1.2 V	Host Interface McBSP PCI UTOPIA	External	Surface Mount	3.3 V	532-BFBGA FCBGA	532-FCBGA (23x23)	500 MHz
Texas Instruments TMS32C6414EGLZ6E3	1.03 MB	90 °C	0 °C	Fixed Point	1.4 V	Host Interface McBSP	External	Surface Mount	3.3 V	532-BFBGA FCBGA	532-FCBGA (23x23)	600 MHz
Texas Instruments TMS32C6415DGLZ7E3	1.03 MB	90 °C	0 °C	Fixed Point	1.4 V	Host Interface McBSP PCI UTOPIA	External	Surface Mount	3.3 V	532-BFBGA FCBGA	532-FCBGA (23x23)	720 MHz
Texas Instruments TMS32C6414DGLZ5E0	1.03 MB	90 °C	0 °C	Fixed Point	1.2 V	Host Interface McBSP	External	Surface Mount	3.3 V	532-BFBGA FCBGA	532-FCBGA (23x23)	500 MHz
Texas Instruments TMS320C6211BZFN150	72 kB	90 °C	0 °C	Fixed Point	1.8 V	Host Interface McBSP	External	Surface Mount	3.3 V	256-BGA	256-BGA (27x27)
Texas Instruments TMS32C6713BZDPA200	264 kB	105 °C	-40 °C	Floating Point	1.2 V		External	Surface Mount	3.3 V	272-BBGA	272-BGA (27x27)	200 MHz
Texas Instruments TMS32C6415DGLZ6E3	1.03 MB	90 °C	0 °C	Fixed Point	1.4 V	Host Interface McBSP PCI UTOPIA	External	Surface Mount	3.3 V	532-BFBGA FCBGA	532-FCBGA (23x23)	600 MHz

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Texas Instruments	JEDEC TRAY (5+1)	1	$ 98.91
		100	$ 95.93
		250	$ 79.87
		1000	$ 74.37

Description

General part information

TMS320C6202B Series

This device is a member of TI's C5000 fixed-point Digital Signal Processor (DSP) product family and is designed for low active and standby power consumption.

The device is based on the TMS320C55x DSP generation CPU processor core. The C55x DSP architecture achieves high performance and low power through increased parallelism and total focus on power savings. The CPU supports an internal bus structure that is composed of one program bus, one 32-bit data read bus and two 16-bit data read buses, two 16-bit data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to four 16-bit data reads and two 16-bit data writes in a single cycle. The device also includes four DMA controllers, each with 4 channels, providing data movement for 16 independent channel contexts without CPU intervention. Each DMA controller can perform one 32-bit data transfer per cycle, in parallel and independent of the CPU activity.

The C55x CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit x 17-bit multiplication and a 32-bit add in a single cycle. A central 40-bit arithmetic and logic unit (ALU) is supported by an additional 16-bit ALU. Use of the ALUs is under instruction set control, providing the ability to optimize parallel activity and power consumption. These resources are managed in the Address Unit (AU) and Data Unit (DU) of the C55x CPU.

Documents

Technical documentation and resources

TMS32C6202BGNZA250

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TMS32C6202BGNZA250

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Technical Specifications

TMS320C6202B Series

Pricing

Description

TMS320C6202B Series

Documents

TMS320C6000 u-Law and a-Law Companding with Software or the McBSP

TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E)

TMS320C620x/TMS3206701 DMA and CPU: Data Access Performance (Rev. A)

On the Implementation of MPEG-4 Motion Compensation Using the TMS320C62x

TMS320C6202, TMS320C6202B Fixed-Point Digital Signal Processors datasheet (Rev. I)

Circular Buffering on TMS320C6000 (Rev. A)

ETSI Math Operations in C for the TMS320C62x (Rev. A)

TMS320C6000 DSP 32-bit Timer Reference Guide (Rev. B)

MPEG-2 Video Decoder: TMS320C62x (TM) DSP Implementation

TMS320C6202, TMS320C6202B DSPs Silicon Errata (Rev. H)

TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B)

TMS320C6000 Expansion Bus Host Interface Performance

TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A)

Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A)

TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A)

G.723.1 Dual Rate Speech Coder: Multichannel TMS320C62x Implementation (Rev. B)

TMS320C6000 CPU and Instruction Set Reference Guide (Rev. G)

TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C)

TMS320C6000 DSP Multichannel Buffered Serial Port (McBSP) Reference Guide (Rev. G)

TMS320C62x DSP CPU and Instruction Set Reference Guide (Rev. A)

TMS320C62x/C67x Power Consumption Summary (Rev. C)

TMS320C6000 McBSP: Interface to SPI ROM (Rev. C)

Using a TMS320C6000 McBSP for Data Packing (Rev. A)

TMS320C6000 DSP Designing for JTAG Emulation Reference Guide

TMS320C6000 McBSP as a TDM Highway (Rev. A)

TMS320C6000 McBSP: I2S Interface

TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. Q)

TMS320C6000 Expansion Bus to MC68360 Microprocessor Interface (Rev. A)

GSM Enhanced Full Rate Speech Coder: Multichannel TMS320C62x Implementation (Rev. B)

TMS320C6000 Expansion Bus: Multiple DSPs to i80960Kx/Jx Microproessor Interface (Rev. A)

TMS320C6000 C Compiler: C Implementation of Intrinsics

TMS320C6000 Expansion Bus to Intel80960Kx/Jx Microprocessor Interface (Rev. B)

TMS320C62x DSP Expansion Bus (XBUS) Reference Guide (Rev. A)

TMS320C6000 Board Design: Considerations for Debug (Rev. C)

TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D)

TMS320C620x/C670x DSP Program & Data Memory Controller/DMA Controller Ref.Guide (Rev. A)

Migrating across the TMS320C6202/02B/03B/04 DSPs (Rev. D)

IS-127 Enhanced Var Rate Speech Coder:Multichannel TMS320C62x Implementation (Rev. B)

TMS320C6000 EMIF to External Flash Memory (Rev. A)

TMS320C6000 DSP Interrupt Selector Reference Guide (Rev. A)

TMS320C6000 System Clock Circuit Example (Rev. A)

Extended Precision Radix-4 Fast Fourier Transform Implemented on the TMS320C62x

TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A)

TMS320C620x/C642x McBSP: UART (Rev. C)

How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A)

Using IBIS Models for Timing Analysis (Rev. A)

TMS320C6000 Memory Test (Rev. A)

Introduction to TMS320C6000 DSP Optimization

TMS320C6000 McBSP: IOM-2 Interface (Rev. A)

Thermal Considerations for the DM64xx, DM64x, and C6000 Devices

TMS320C6000 Expansion Bus Interface to PCI Bus Through PLX PCI9080 (Rev. A)

TMS320C6000 DMA Example Applications (Rev. A)

G.729/A Speech Coder: Multichannel TMS320C62x Implementation (Rev. B)

Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A)

General Guide to Implement Logarithmic and Exponential Operations on Fixed-Point

TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (Rev. E)

TMS320C6000 Expansion Bus: Multiple DSP Connection Using Asynchronous (Rev. A)

TMS320C620x/C670x DSP Boot Modes and Configuration Reference Guide

TMS320C6000 Board Design for JTAG (Rev. C)

TMS320C6000 McBSP Initialization (Rev. C)

TMS320C6000 Expansion Bus to MPC860 Microprocessor Interface (Rev. B)

TMS320C6202B Series