
TPS51200EVM
ActiveTPS51200 LINEAR REGULATOR EVALUATION BOARD
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TPS51200EVM
ActiveTPS51200 LINEAR REGULATOR EVALUATION BOARD
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Technical Specifications
Parameters and characteristics for this part
| Specification | TPS51200EVM |
|---|---|
| Board Type | Fully Populated |
| Current - Output | 2 A, 10 mA |
| Main Purpose | Special Purpose DC/DC, DDR Memory Supply |
| Outputs and Type | 2 |
| Outputs and Type | Non-Isolated |
| Regulator Topology | Buck |
| Supplied Contents | Board(s) |
| Utilized IC / Part | TPS51200 |
| Voltage - Input [Max] | 3.5 V |
| Voltage - Input [Min] | 2.4 V |
| Voltage - Output [Max] | 1.5 V |
| Voltage - Output [Min] | 1.2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Box | 1 | $ 58.80 | |
Description
General part information
TPS51200A-Q1 Series
The TPS51200-Q1 device is a sink and source double-data-rate (DDR) termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration.
The TPS51200-Q1 device maintains a fast transient response and only requires a minimum output capacitance of 20 µF. The TPS51200-Q1 device supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, DDR3L, Low Power DDR3 and DDR4 VTT bus termination.
In addition, the TPS51200-Q1 device provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.
Documents
Technical documentation and resources