TPS51200A-Q1 Series

Automotive Catalog Sink/Source DDR Termination Regulator

Catalog

Automotive Catalog Sink/Source DDR Termination Regulator

Part	Mounting Type	Supplier Device Package	Number of Outputs	Qualification	Voltage - Input [Min]	Voltage - Input [Max]	Package / Case	Applications	Grade	Operating Temperature [Min]	Operating Temperature [Max]	Voltage - Output [Min]	Voltage - Output [Max]	Outputs and Type	Outputs and Type	Main Purpose	Utilized IC / Part	Current - Output	Regulator Topology	Supplied Contents	Board Type
Texas Instruments TPS51200QDRCRQ1	Surface Mount	10-VSON (3x3)	1	AEC-Q100	2.38 V	3.5 V	10-VFDFN Exposed Pad	Converter DDR	Automotive	-40 °C	125 °C
Texas Instruments TPS51200AQDRCTQ1	Surface Mount	10-VSON (3x3)	1	AEC-Q100	2.375 V	3.5 V	10-VFDFN Exposed Pad	Controller DDR	Automotive	-40 °C	125 °C	0.5 V	1.8 V
Texas Instruments TPS51200EVM					2.4 V	3.5 V						1.2 V	1.5 V	2	Non-Isolated	Special Purpose DC/DC DDR Memory Supply	TPS51200	2 A 10 mA	Buck	Board(s)	Fully Populated
Texas Instruments TPS51200DRCTG4	Surface Mount	10-VSON (3x3)	1		2.38 V	3.5 V	10-VFDFN Exposed Pad	Converter DDR		-40 °C	85 °C
Texas Instruments TPS51200MDRCTEP	Surface Mount	10-VSON (3x3)	1		2.38 V	3.5 V	10-VFDFN Exposed Pad	Converter DDR		-55 °C	125 °C
Texas Instruments TPS51200AQDRCRQ1	Surface Mount	10-VSON (3x3)	1	AEC-Q100	2.375 V	3.5 V	10-VFDFN Exposed Pad	Controller DDR	Automotive	-40 °C	125 °C	0.5 V	1.8 V

Catalog

Automotive Catalog Sink/Source DDR Termination Regulator

Key Features

• Input Voltage: Supports 2.5-V Rail and 3.3-V RailVLDOIN Voltage Range: 1.1 V to 3.5 VSink and Source Termination Regulator IncludesDroop CompensationRequires Minimum Output Capacitance of 20-µF(Typically 3 × 10-µF MLCCs) for MemoryTermination Applications (DDR)PGOOD to Monitor Output RegulationEN InputREFIN Input Allows for Flexible Input TrackingEither Directly or Through Resistor DividerRemote Sensing (VOSNS)±10-mA Buffered Reference (REFOUT)Built-in Soft Start, UVLO, and OCLThermal ShutdownMeets DDR and DDR2 JEDEC SpecificationsSupports DDR3, Low-Power DDR3, and DDR4VTT Applications10-Pin VSON Package With Thermal PadSupports Defense, Aerospace, and MedicalApplicationsControlled BaselineOne Assembly and Test SiteOne Fabrication SiteAvailable in Military (–55°C to 125°C)Temperature RangeExtended Product Life CycleExtended Product-Change NotificationProduct TraceabilityInput Voltage: Supports 2.5-V Rail and 3.3-V RailVLDOIN Voltage Range: 1.1 V to 3.5 VSink and Source Termination Regulator IncludesDroop CompensationRequires Minimum Output Capacitance of 20-µF(Typically 3 × 10-µF MLCCs) for MemoryTermination Applications (DDR)PGOOD to Monitor Output RegulationEN InputREFIN Input Allows for Flexible Input TrackingEither Directly or Through Resistor DividerRemote Sensing (VOSNS)±10-mA Buffered Reference (REFOUT)Built-in Soft Start, UVLO, and OCLThermal ShutdownMeets DDR and DDR2 JEDEC SpecificationsSupports DDR3, Low-Power DDR3, and DDR4VTT Applications10-Pin VSON Package With Thermal PadSupports Defense, Aerospace, and MedicalApplicationsControlled BaselineOne Assembly and Test SiteOne Fabrication SiteAvailable in Military (–55°C to 125°C)Temperature RangeExtended Product Life CycleExtended Product-Change NotificationProduct Traceability

Description

The TPS51200-Q1 device is a sink and source double-data-rate (DDR) termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration. The TPS51200-Q1 device maintains a fast transient response and only requires a minimum output capacitance of 20 µF. The TPS51200-Q1 device supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, DDR3L, Low Power DDR3 and DDR4 VTT bus termination. In addition, the TPS51200-Q1 device provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications. The TPS51200-Q1 device is available in the thermally-efficient VSON-10 package, and is rated both green and Pb-free. The device is specified from –40°C to 125°C. The TPS51200-Q1 device is a sink and source double-data-rate (DDR) termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration. The TPS51200-Q1 device maintains a fast transient response and only requires a minimum output capacitance of 20 µF. The TPS51200-Q1 device supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, DDR3L, Low Power DDR3 and DDR4 VTT bus termination. In addition, the TPS51200-Q1 device provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications. The TPS51200-Q1 device is available in the thermally-efficient VSON-10 package, and is rated both green and Pb-free. The device is specified from –40°C to 125°C.