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SOT-23 (DBV)
Integrated Circuits (ICs)

SN74LVC1G80DBVT

Active
Texas Instruments

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

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SOT-23 (DBV)
Integrated Circuits (ICs)

SN74LVC1G80DBVT

Active
Texas Instruments

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC1G80DBVT
Clock Frequency160 MHz
Current - Output High, Low [x]32 mA
Current - Output High, Low [y]32 mA
Current - Quiescent (Iq)10 µA
FunctionStandard
Input Capacitance3.5 pF
Max Propagation Delay @ V, Max CL4.5 ns
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output Type1.81 mOhm
Package / CaseSC-74A, SOT-753
Supplier Device PackageSOT-23-5
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.90
10$ 0.80
25$ 0.76
100$ 0.63
Digi-Reel® 1$ 0.90
10$ 0.80
25$ 0.76
100$ 0.63
Tape & Reel (TR) 250$ 0.59
500$ 0.52
1250$ 0.41
2500$ 0.38
6250$ 0.36
12500$ 0.35
25000$ 0.34
NewarkEach (Supplied on Cut Tape) 1$ 1.58
10$ 1.53
25$ 1.48
50$ 1.44
100$ 1.40
Texas InstrumentsSMALL T&R 1$ 0.67
100$ 0.51
250$ 0.38
1000$ 0.27

Description

General part information

SN74LVC1G80 Series

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation.

When data at the data (D) input meets the setup time requirement, the data is transferred to theQoutput on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Documents

Technical documentation and resources

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Power-Up Behavior of Clocked Devices (Rev. B)

Application note

Signal Switch Data Book (Rev. A)

User guide

Selecting the Right Level Translation Solution (Rev. A)

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Understanding Advanced Bus-Interface Products Design Guide

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

How to Select Little Logic (Rev. A)

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

SN74LVC1G80 Single Positive-Edge-Triggered D-Type Flip-Flop datasheet (Rev. S)

Data sheet

Low-Voltage Logic (LVC) Designer's Guide

Design guide

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

LVC Characterization Information

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Texas Instruments Little Logic Application Report

Application note

Live Insertion

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Logic Guide (Rev. AB)

Selection guide

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Product Change Notice EN

Datasheet