SN74LVC1G80 Series

Single Positive-Edge-Triggered D-Type Flip-Flop

Catalog

Single Positive-Edge-Triggered D-Type Flip-Flop

Part	Supplier Device Package [x]	Supplier Device Package	Supplier Device Package [y]	Trigger Type	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Current - Output High, Low [y]	Current - Output High, Low [x]	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case	Output Type	Clock Frequency	Current - Quiescent (Iq)	Type	Function	Max Propagation Delay @ V, Max CL	Input Capacitance	Number of Elements	Number of Bits per Element
Texas Instruments SN74LVC1G80YEPR	1.4	5-DSBGA	0.9	Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	85 °C	-40 °C	5-XFBGA DSBGA	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1
Texas Instruments SN74LVC1G80YZAR	1.4	5-DSBGA	0.9	Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	85 °C	-40 °C	5-XFBGA DSBGA	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1
Texas Instruments SN74LVC1G80DCKRG4		SC-70-5		Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	125 °C	-40 °C	5-TSSOP SC-70-5 SOT-353	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1
Texas Instruments SN74LVC1G80YZPR	1.4	5-DSBGA	0.9	Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	85 °C	-40 °C	5-XFBGA DSBGA	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1
Texas Instruments SN74LVC1G80DBVRG4		SOT-23-5		Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	125 °C	-40 °C	SC-74A SOT-753	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1
Texas Instruments SN74LVC1G80DBVTG4		SOT-23-5		Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	125 °C	-40 °C	SC-74A SOT-753	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1
Texas Instruments SN74LVC1G80YEAR	1.4	5-DSBGA	0.9	Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	85 °C	-40 °C	5-XFBGA DSBGA	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1
Texas Instruments SN74LVC1G80DCKR		SC-70-5		Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	125 °C	-40 °C	5-TSSOP SC-70-5 SOT-353	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1
Texas Instruments SN74LVC1G80DBVT		SOT-23-5		Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	125 °C	-40 °C	SC-74A SOT-753	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1
Texas Instruments SN74LVC1G80DCKT		SC-70-5		Positive Edge	Surface Mount	5.5 V	1.65 V	32 mA	32 mA	125 °C	-40 °C	5-TSSOP SC-70-5 SOT-353	1.81 mOhm	160 MHz	10 µA	D-Type	Standard	4.5 ns	3.5 pF	1	1

Catalog

Single Positive-Edge-Triggered D-Type Flip-Flop

Key Features

• Available in the Texas Instruments NanoFree™ PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VSupports Down Translation to VCCMaximum tpdof 4.2 ns at 3.3 VLow Power Consumption, 10-µA Maximum ICC±24-mA Output Drive at 3.3 VIoffSupports Live Insertion, Partial-Power-Down Mode, and Back-Drive ProtectionLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Available in the Texas Instruments NanoFree™ PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VSupports Down Translation to VCCMaximum tpdof 4.2 ns at 3.3 VLow Power Consumption, 10-µA Maximum ICC±24-mA Output Drive at 3.3 VIoffSupports Live Insertion, Partial-Power-Down Mode, and Back-Drive ProtectionLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)

Description

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation. When data at the data (D) input meets the setup time requirement, the data is transferred to theQoutput on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation. When data at the data (D) input meets the setup time requirement, the data is transferred to theQoutput on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.