
SN74LV32ADR
Active4-CH, 2-INPUT 2-V TO 5.5-V HIGH-SPEED (7 NS) OR GATE
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SN74LV32ADR
Active4-CH, 2-INPUT 2-V TO 5.5-V HIGH-SPEED (7 NS) OR GATE
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LV32ADR |
|---|---|
| Current - Output High, Low [custom] | 12 mA |
| Current - Output High, Low [custom] | 12 mA |
| Current - Quiescent (Max) [Max] | 20 µA |
| Input Logic Level - High | 1.5 V |
| Input Logic Level - Low | 0.5 V |
| Logic Type | OR Gate |
| Max Propagation Delay @ V, Max CL | 7.5 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 4 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 14-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.92 | |
| 10 | $ 0.57 | |||
| 25 | $ 0.48 | |||
| 100 | $ 0.37 | |||
| 250 | $ 0.32 | |||
| 500 | $ 0.29 | |||
| 1000 | $ 0.26 | |||
| Digi-Reel® | 1 | $ 0.92 | ||
| 10 | $ 0.57 | |||
| 25 | $ 0.48 | |||
| 100 | $ 0.37 | |||
| 250 | $ 0.32 | |||
| 500 | $ 0.29 | |||
| 1000 | $ 0.26 | |||
| Tape & Reel (TR) | 2500 | $ 0.13 | ||
| 5000 | $ 0.12 | |||
| 7500 | $ 0.11 | |||
| 12500 | $ 0.10 | |||
| 17500 | $ 0.10 | |||
| 25000 | $ 0.10 | |||
| 62500 | $ 0.09 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.21 | |
| 100 | $ 0.14 | |||
| 250 | $ 0.11 | |||
| 1000 | $ 0.07 | |||
Description
General part information
SN74LV32A-EP Series
This quadruple 2-input positive-OR gate is designed for 2-V to 5.5-V VCCoperation.
The SN74LV32A-EP performs the Boolean function Y = A + B or Y = (A\ • B\)\ in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Documents
Technical documentation and resources