SN74LV32A-EP Series

Enhanced product, 4-ch, 2-input 2-V to 5.5-V high-speed (7 ns) OR gate

Catalog

Enhanced product, 4-ch, 2-input 2-V to 5.5-V high-speed (7 ns) OR gate

Part	Input Logic Level - High	Max Propagation Delay @ V, Max CL	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Voltage - Supply [Max]	Voltage - Supply [Min]	Logic Type	Number of Inputs	Input Logic Level - Low	Current - Quiescent (Max) [Max]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case [custom]	Package / Case [custom]	Package / Case	Number of Circuits	Mounting Type	Package / Case [x]	Package / Case [y]	Grade	Qualification	Package / Case	Package / Case
Texas Instruments SN74LV32APW	1.5 V	7.5 ns	14-TSSOP	125 °C	-40 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA	0.173 "	4.4 mm	14-TSSOP	4	Surface Mount
Texas Instruments SN74LV32AD	1.5 V	7.5 ns		125 °C	-40 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA			14-SOIC	4	Surface Mount	0.154 in	3.9 mm
Texas Instruments SN74LV32ADR	1.5 V	7.5 ns		125 °C	-40 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA			14-SOIC	4	Surface Mount	0.154 in	3.9 mm
Texas Instruments SN74LV32ATPWRG4Q1	1.5 V	7.5 ns	14-TSSOP	105 ░C	-40 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA	0.173 "	4.4 mm	14-TSSOP	4	Surface Mount			Automotive	AEC-Q100
Texas Instruments SN74LV32ADBRE4	1.5 V	7.5 ns	14-SSOP	125 °C	-40 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA			14-SSOP	4	Surface Mount					5.3 mm	0.209 "
Texas Instruments SN74LV32AMPWREP	1.5 V	7.5 ns	14-TSSOP	125 °C	-55 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA	0.173 "	4.4 mm	14-TSSOP	4	Surface Mount
Texas Instruments SN74LV32ARGYR	1.5 V	7.5 ns	14-VQFN (3.5x3.5)	125 °C	-40 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA			14-VFQFN Exposed Pad	4	Surface Mount
Texas Instruments SN74LV32ATPWRQ1	1.5 V	7.5 ns	14-TSSOP	105 ░C	-40 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA	0.173 "	4.4 mm	14-TSSOP	4	Surface Mount			Automotive	AEC-Q100
Texas Instruments SN74LV32ADBR	1.5 V	7.5 ns	14-SSOP	125 °C	-40 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA			14-SSOP	4	Surface Mount					5.3 mm	0.209 "
Texas Instruments SN74LV32ADGVR	1.5 V	7.5 ns		125 °C	-40 °C	5.5 V	2 V	OR Gate	2	0.5 V	20 µA	12 mA	12 mA			14-TFSOP	4	Surface Mount	0.173 in 4.4 mm

Catalog

Enhanced product, 4-ch, 2-input 2-V to 5.5-V high-speed (7 ns) OR gate

Key Features

• Controlled BaselineOne Assembly/Test Site, One Fabrication SiteExtended Temperature Performance of -55°C to 125°CEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification Pedigree(1)2-V to 5.5-V VCCOperationMax tpdof 7.5 ns at 5 VTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) > 2.3 V at VCC= 3.3 V, TA= 25°CSupports Mixed-Mode Voltage Operation on All PortsIoffSupports Partial-Power-Down Mode Operation(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specifiedperformance and environmental limits.Controlled BaselineOne Assembly/Test Site, One Fabrication SiteExtended Temperature Performance of -55°C to 125°CEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification Pedigree(1)2-V to 5.5-V VCCOperationMax tpdof 7.5 ns at 5 VTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) > 2.3 V at VCC= 3.3 V, TA= 25°CSupports Mixed-Mode Voltage Operation on All PortsIoffSupports Partial-Power-Down Mode Operation(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specifiedperformance and environmental limits.

Description

This quadruple 2-input positive-OR gate is designed for 2-V to 5.5-V VCCoperation. The SN74LV32A-EP performs the Boolean function Y = A + B or Y = (A\ • B\)\ in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This quadruple 2-input positive-OR gate is designed for 2-V to 5.5-V VCCoperation. The SN74LV32A-EP performs the Boolean function Y = A + B or Y = (A\ • B\)\ in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.