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20-SOIC,DW
Integrated Circuits (ICs)

SN74HCT240DWR

Active
Texas Instruments

8-CH, 4.5V TO 5.5V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS

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20-SOIC,DW
Integrated Circuits (ICs)

SN74HCT240DWR

Active
Texas Instruments

8-CH, 4.5V TO 5.5V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74HCT240DWR
Current - Output High, Low [custom]6 mA
Current - Output High, Low [custom]6 mA
Logic TypeInverting, Buffer
Mounting TypeSurface Mount
Number of Bits per Element4
Number of Elements2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case20-SOIC
Package / Case [y]0.295 in
Package / Case [y]7.5 mm
Supplier Device Package20-SOIC
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 5$ 0.40
50$ 0.25
100$ 0.20
200$ 0.20
500$ 0.19
DigikeyCut Tape (CT) 1$ 0.57
10$ 0.49
25$ 0.45
100$ 0.36
250$ 0.34
500$ 0.29
1000$ 0.22
Digi-Reel® 1$ 0.57
10$ 0.49
25$ 0.45
100$ 0.36
250$ 0.34
500$ 0.29
1000$ 0.22
Tape & Reel (TR) 2000$ 0.20
6000$ 0.19
10000$ 0.18
50000$ 0.16
Texas InstrumentsLARGE T&R 1$ 0.36
100$ 0.25
250$ 0.19
1000$ 0.13

Description

General part information

SN74HCT240 Series

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.