
SN74HCT240NSR
Active8-CH, 4.5V TO 5.5V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS
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SN74HCT240NSR
Active8-CH, 4.5V TO 5.5V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74HCT240NSR |
|---|---|
| Current - Output High, Low [custom] | 6 mA |
| Current - Output High, Low [custom] | 6 mA |
| Logic Type | Inverting, Buffer |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 4 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | 3-State |
| Package / Case | 20-SOIC |
| Package / Case | 0.209 " |
| Package / Case | 5.3 mm |
| Supplier Device Package | 20-SO |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.86 | |
| 10 | $ 0.75 | |||
| 25 | $ 0.71 | |||
| 100 | $ 0.58 | |||
| 250 | $ 0.54 | |||
| 500 | $ 0.46 | |||
| 1000 | $ 0.37 | |||
| Digi-Reel® | 1 | $ 0.86 | ||
| 10 | $ 0.75 | |||
| 25 | $ 0.71 | |||
| 100 | $ 0.58 | |||
| 250 | $ 0.54 | |||
| 500 | $ 0.46 | |||
| 1000 | $ 0.37 | |||
| Tape & Reel (TR) | 2000 | $ 0.25 | ||
| Texas Instruments | LARGE T&R | 1 | $ 0.65 | |
| 100 | $ 0.44 | |||
| 250 | $ 0.34 | |||
| 1000 | $ 0.23 | |||
Description
General part information
SN74HCT240 Series
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
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Technical documentation and resources