
CD74HC240M96
Active8-CH, 2-V TO 6-V INVERTERS WITH 3-STATE OUTPUTS
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CD74HC240M96
Active8-CH, 2-V TO 6-V INVERTERS WITH 3-STATE OUTPUTS
Technical Specifications
Parameters and characteristics for this part
| Specification | CD74HC240M96 |
|---|---|
| Current - Output High, Low [custom] | 7.8 mA |
| Current - Output High, Low [custom] | 7.8 mA |
| Logic Type | Inverting, Buffer |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 4 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | 3-State |
| Package / Case | 20-SOIC |
| Package / Case [y] | 0.295 in |
| Package / Case [y] | 7.5 mm |
| Supplier Device Package | 20-SOIC |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.65 | |
| 10 | $ 0.58 | |||
| 25 | $ 0.55 | |||
| 100 | $ 0.45 | |||
| 250 | $ 0.42 | |||
| 500 | $ 0.37 | |||
| 1000 | $ 0.34 | |||
| Digi-Reel® | 1 | $ 0.65 | ||
| 10 | $ 0.58 | |||
| 25 | $ 0.55 | |||
| 100 | $ 0.45 | |||
| 250 | $ 0.42 | |||
| 500 | $ 0.37 | |||
| 1000 | $ 0.34 | |||
| Tape & Reel (TR) | 2000 | $ 0.34 | ||
| Texas Instruments | LARGE T&R | 1 | $ 0.35 | |
| 100 | $ 0.27 | |||
| 250 | $ 0.20 | |||
| 1000 | $ 0.14 | |||
Description
General part information
SN74HC240 Series
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
Documents
Technical documentation and resources