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Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC16373ADGGRG4 |
|---|---|
| Circuit [custom] | 8 |
| Circuit [custom] | 8 |
| Current - Output High, Low | 24 mA |
| Delay Time - Propagation | 2.1 ns |
| Independent Circuits | 2 |
| Logic Type | D-Type Transparent Latch |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State |
| Package / Case | 48-TFSOP |
| Package / Case | 0.24 in |
| Package / Case [custom] | 6.1 mm |
| Supplier Device Package | 48-TSSOP |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 2000 | $ 0.64 | |
| 6000 | $ 0.61 | |||
| 10000 | $ 0.59 | |||
Description
General part information
SN74LVC16373A-EP Series
This 16-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCCoperation.
The SN74LVC16373A is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
Documents
Technical documentation and resources
