Specification	SN74LVC16373DGGR

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low	24 mA
Delay Time - Propagation	2.1 ns
Independent Circuits	2
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	48-TFSOP
Package / Case	0.24 in
Package / Case [custom]	6.1 mm
Supplier Device Package	48-TSSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74LVC16373A-EP Series

Enhanced Product 16-Bit Transparent D-Type Latch With 3-State Outputs

Part	Independent Circuits	Delay Time - Propagation	Logic Type	Output Type	Operating Temperature [Min]	Operating Temperature [Max]	Current - Output High, Low	Mounting Type	Supplier Device Package	Circuit [custom]	Circuit [custom]	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case [y]	Package / Case	Package / Case [y]	Package / Case	Package / Case [custom]
Texas Instruments CLVC16373AMDLREP	1	1.3 ns	D-Type Transparent Latch	Tri-State	-55 °C	125 °C	24 mA	Surface Mount	48-SSOP	8	8	1.65 V	3.6 V	0.295 in	48-BSSOP	7.5 mm
Texas Instruments SN74LVC16373DGGR	2	2.1 ns	D-Type Transparent Latch	Tri-State	-40 °C	85 °C	24 mA	Surface Mount	48-TSSOP	8	8	1.65 V	3.6 V		48-TFSOP		0.24 in	6.1 mm
Texas Instruments 74LVC16373DGGRG4	2	2.1 ns	D-Type Transparent Latch	Tri-State	-40 °C	85 °C	24 mA	Surface Mount	48-TSSOP	8	8	1.65 V	3.6 V		48-TFSOP		0.24 in	6.1 mm
Texas Instruments SN74LVC16373ADLR	2	2.1 ns	D-Type Transparent Latch	Tri-State	-40 °C	85 °C	24 mA	Surface Mount	48-SSOP	8	8	1.65 V	3.6 V	0.295 in	48-BSSOP	7.5 mm
Texas Instruments SN74LVC16373AZQLR	2	2.1 ns	D-Type Transparent Latch	Tri-State	-40 °C	85 °C	24 mA	Surface Mount	56-BGA Microstar Junior (7x4.5)	8	8	1.65 V	3.6 V		56-VFBGA
Texas Instruments SN74LVC16373ADGVR	2	2.1 ns	D-Type Transparent Latch	Tri-State	-40 °C	85 °C	24 mA	Surface Mount		8	8	1.65 V	3.6 V		48-TFSOP		0.173 in 4.4 mm
Texas Instruments 74LVC16373DGGRE4	2	8 ns	D-Type Transparent Latch	Non-Inverted Tri-State	-40 °C	85 °C	24 mA	Surface Mount	48-TSSOP	8	8	1.65 V	3.6 V		48-TFSOP		0.24 in	6.1 mm
Texas Instruments SN74LVC16373ADLG4	2	2.1 ns	D-Type Transparent Latch	Tri-State	-40 °C	85 °C	24 mA	Surface Mount	48-SSOP	8	8	1.65 V	3.6 V	0.295 in	48-BSSOP	7.5 mm
Texas Instruments 74LVC16373ADGGRG4	2	2.1 ns	D-Type Transparent Latch	Tri-State	-40 °C	85 °C	24 mA	Surface Mount	48-TSSOP	8	8	1.65 V	3.6 V		48-TFSOP		0.24 in	6.1 mm
Texas Instruments 74LVC16373ADGVRE4	2	2.1 ns	D-Type Transparent Latch	Tri-State	-40 °C	85 °C	24 mA	Surface Mount		8	8	1.65 V	3.6 V		48-TFSOP		0.173 in 4.4 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.38
		10	$ 1.23
		25	$ 1.17
		100	$ 0.96
		250	$ 0.90
		500	$ 0.79
		1000	$ 0.63
	Digi-Reel®	1	$ 1.38
		10	$ 1.23
		25	$ 1.17
		100	$ 0.96
		250	$ 0.90
		500	$ 0.79
		1000	$ 0.63
	Tape & Reel (TR)	2000	$ 0.58
		6000	$ 0.55
		10000	$ 0.53
Texas Instruments	LARGE T&R	1	$ 1.02
		100	$ 0.79
		250	$ 0.58
		1000	$ 0.41

Description

General part information

SN74LVC16373A-EP Series

This 16-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCCoperation.

The SN74LVC16373A is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

Documents

Technical documentation and resources

SN74LVC16373DGGR

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SN74LVC16373DGGR

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Technical Specifications

SN74LVC16373A-EP Series

Pricing

Description

SN74LVC16373A-EP Series

Documents

How to Select Little Logic (Rev. A)

Understanding Advanced Bus-Interface Products Design Guide

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

16-Bit Transparent D-Type Latch With 3-State Outputs datasheet (Rev. B)

Logic Guide (Rev. AB)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

LOGIC Pocket Data Book (Rev. B)

Design Summary for WCSP Little Logic (Rev. B)

Selecting the Right Level Translation Solution (Rev. A)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Texas Instruments Little Logic Application Report

Low-Voltage Logic (LVC) Designer's Guide

Little Logic Guide 2018 (Rev. G)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Signal Switch Data Book (Rev. A)

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

CMOS Power Consumption and CPD Calculation (Rev. B)

Power-Up Behavior of Clocked Devices (Rev. B)

TI IBIS File Creation, Validation, and Distribution Processes

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Input and Output Characteristics of Digital Integrated Circuits

Standard Linear & Logic for PCs, Servers & Motherboards

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

Live Insertion

LVC Characterization Information

SN74LVC16373A-EP Series