Texas Instruments

The LMH0001 SMPTE 259M / 344M Serial Digital Cable Driver is designed for use in SMPTE 259M / 344M serial digital video applications. The LMH0001 drives 75Ω transmission lines (Belden 8281, Belden 1694A or equivalent) at data rates up to 540 Mbps. The output voltage swing of the LMH0001 is adjustable via a single external resistor. The LMH0001 is powered from a single 3.3V supply. Power consumption is typically 125mW. The LMH0001 is available in a 16-pin WQFN package. The LMH0001 SMPTE 259M / 344M Serial Digital Cable Driver is designed for use in SMPTE 259M / 344M serial digital video applications. The LMH0001 drives 75Ω transmission lines (Belden 8281, Belden 1694A or equivalent) at data rates up to 540 Mbps. The output voltage swing of the LMH0001 is adjustable via a single external resistor. The LMH0001 is powered from a single 3.3V supply. Power consumption is typically 125mW. The LMH0001 is available in a 16-pin WQFN package.

The LMH0002 SMPTE 292M / 259M serial digital cable driver is a monolithic, high-speed cable driver designed for use in SMPTE 292M / 259M serial digital video and ITU-T G.703 serial digital data transmission applications. The LMH0002 drives 75Ω transmission lines (Belden 8281, Belden 1694A or equivalent) at data rates up to 1.485 Gbps. The LMH0002 provides two selectable slew rates for SMPTE 259M and SMPTE 292M compliance. The output voltage swing is adjustable via a single external resistor. The LMH0002 is powered from a single 3.3V supply. Power consumption is typically 125 mW in SD mode and 149 mW in HD mode. The LMH0002 is available in an 8-pin SOIC or 16-pin WQFN package. The LMH0002 SMPTE 292M / 259M serial digital cable driver is a monolithic, high-speed cable driver designed for use in SMPTE 292M / 259M serial digital video and ITU-T G.703 serial digital data transmission applications. The LMH0002 drives 75Ω transmission lines (Belden 8281, Belden 1694A or equivalent) at data rates up to 1.485 Gbps. The LMH0002 provides two selectable slew rates for SMPTE 259M and SMPTE 292M compliance. The output voltage swing is adjustable via a single external resistor. The LMH0002 is powered from a single 3.3V supply. Power consumption is typically 125 mW in SD mode and 149 mW in HD mode. The LMH0002 is available in an 8-pin SOIC or 16-pin WQFN package.

The LMH0340/0040/0070/0050 SDI Serializers are part of TI’s family of FPGA-Attach SER/DES products supporting 5-bit LVDS interfaces with FPGAs. An FPGA Host will format data with supplied IP such that the output of the LMH0340 is compliant with the requirements of DVB-ASI, SMPTE 259M-C, SMPTE 292M and SMPTE 424M standards. See for details on which Standards are supported per device. The interface between the SER (Serializer) and the FPGA consists of a 5 bit wide LVDS data bus, an LVDS clock and an SMBus interface. The LMH0340/0040/0070 SER devices include an integrated cable driver which is fully compliant with all of the SMPTE specifications listed above. The LMH0050 has a CML output driver that can drive a differential transmission line or interface to a cable driver. The FPGA-Attach SER/DES family is supported by a suite of IP which allows the design engineer to quickly develop video applications using the SER/DES products. The SER is packaged in a physically small 48-pin WQFN package. The LMH0340/0040/0070/0050 SDI Serializers are part of TI’s family of FPGA-Attach SER/DES products supporting 5-bit LVDS interfaces with FPGAs. An FPGA Host will format data with supplied IP such that the output of the LMH0340 is compliant with the requirements of DVB-ASI, SMPTE 259M-C, SMPTE 292M and SMPTE 424M standards. See for details on which Standards are supported per device. The interface between the SER (Serializer) and the FPGA consists of a 5 bit wide LVDS data bus, an LVDS clock and an SMBus interface. The LMH0340/0040/0070 SER devices include an integrated cable driver which is fully compliant with all of the SMPTE specifications listed above. The LMH0050 has a CML output driver that can drive a differential transmission line or interface to a cable driver. The FPGA-Attach SER/DES family is supported by a suite of IP which allows the design engineer to quickly develop video applications using the SER/DES products. The SER is packaged in a physically small 48-pin WQFN package.

The LMH0341/0041/0071/0051 SDI Deserializers are part of TI’s family of FPGA-Attach SER/DES products supporting 5-bit LVDS interfaces with FPGAs. When paired with a host FPGA the LMH0341 automatically detects the incoming data rate and decodes the raw 5-bit data words compliant to any of the following standards: DVB-ASI, SMPTE 259M, SMPTE 292M, or SMPTE 424M. See for details on which Standards are supported per device. The interface between the LMH0341 and the host FPGA consists of a 5-bit wide LVDS bus, an LVDS clock and an SMBus interface. No external VCOs or clocks are required. The LMH0341 CDR detects the frequency from the incoming data stream, generates a clean clock and transmits both clock and data to the host FPGA. The LMH0341, LMH0041 and LMH0071 include a serial reclocked loopthrough with integrated SMPTE compliant cable driver. Refer to for a complete listing of single channel deserializers offered in this family. The FPGA-Attach SER/DES product family is supported by a suite of IP which allows the design engineer to quickly develop video applications using the SER/DES products. The product is packaged in a physically small 48 pin WQFN package. The LMH0341/0041/0071/0051 SDI Deserializers are part of TI’s family of FPGA-Attach SER/DES products supporting 5-bit LVDS interfaces with FPGAs. When paired with a host FPGA the LMH0341 automatically detects the incoming data rate and decodes the raw 5-bit data words compliant to any of the following standards: DVB-ASI, SMPTE 259M, SMPTE 292M, or SMPTE 424M. See for details on which Standards are supported per device. The interface between the LMH0341 and the host FPGA consists of a 5-bit wide LVDS bus, an LVDS clock and an SMBus interface. No external VCOs or clocks are required. The LMH0341 CDR detects the frequency from the incoming data stream, generates a clean clock and transmits both clock and data to the host FPGA. The LMH0341, LMH0041 and LMH0071 include a serial reclocked loopthrough with integrated SMPTE compliant cable driver. Refer to for a complete listing of single channel deserializers offered in this family. The FPGA-Attach SER/DES product family is supported by a suite of IP which allows the design engineer to quickly develop video applications using the SER/DES products. The product is packaged in a physically small 48 pin WQFN package.