Texas Instruments

The CLC020 SMPTE 259M Digital Video Serializer with Integrated Cable Driver is a monolithic integrated circuit that encodes, serializes and transmits bit-parallel digital data conforming to SMPTE 125M and SMPTE 267M component video and SMPTE 244M composite video standards. The CLC020 can also serialize other 8 or 10-bit parallel data. The CLC020 operates at data rates from below 100 Mbps to over 400 Mbps. The serial data clock frequency is internally generated and requires no external frequency setting components, trimming or filtering*. Functions performed by the CLC020 include: parallel-to-serial data conversion, data encoding using the polynomial (X9+X4+1), data format conversion from NRZ to NRZI, parallel data clock frequency multiplication and encoding with the serial data, and coaxial cable driving. Input for sync (TRS) detection disabling and a PLL lock detect output are provided. The CLC020 has an exclusive built-in self-test (BIST) and video test pattern generator (TPG) with 4 component video test patterns, reference black, PLL and EQ pathologicals and modified colour bars, in 4:3 and 16:9 raster and both NTSC and PAL formats*. Separate power pins for the output driver, VCO and the digital logic improve power supply rejection, output jitter and noise performance. The CLC020 is the ideal complement to the CLC011B SMPTE 259M Serial Digital Video Decoder, CLC014 Active Cable Equalizer, CLC016 Data Retiming PLL (clock-data separator), CLC018 8X8 Digital Crosspoint Switch and CLC006 or CLC007 Cable Drivers, for a complete parallel-serial-parallel, high-speed data processing and transmission system. The CLC020 is powered from a single 5V supply. Power dissipation is typically 235 mW including two 75Ω back-matched output loads. The device is packaged in a JEDEC 28-lead PLCC. The CLC020 SMPTE 259M Digital Video Serializer with Integrated Cable Driver is a monolithic integrated circuit that encodes, serializes and transmits bit-parallel digital data conforming to SMPTE 125M and SMPTE 267M component video and SMPTE 244M composite video standards. The CLC020 can also serialize other 8 or 10-bit parallel data. The CLC020 operates at data rates from below 100 Mbps to over 400 Mbps. The serial data clock frequency is internally generated and requires no external frequency setting components, trimming or filtering*. Functions performed by the CLC020 include: parallel-to-serial data conversion, data encoding using the polynomial (X9+X4+1), data format conversion from NRZ to NRZI, parallel data clock frequency multiplication and encoding with the serial data, and coaxial cable driving. Input for sync (TRS) detection disabling and a PLL lock detect output are provided. The CLC020 has an exclusive built-in self-test (BIST) and video test pattern generator (TPG) with 4 component video test patterns, reference black, PLL and EQ pathologicals and modified colour bars, in 4:3 and 16:9 raster and both NTSC and PAL formats*. Separate power pins for the output driver, VCO and the digital logic improve power supply rejection, output jitter and noise performance. The CLC020 is the ideal complement to the CLC011B SMPTE 259M Serial Digital Video Decoder, CLC014 Active Cable Equalizer, CLC016 Data Retiming PLL (clock-data separator), CLC018 8X8 Digital Crosspoint Switch and CLC006 or CLC007 Cable Drivers, for a complete parallel-serial-parallel, high-speed data processing and transmission system. The CLC020 is powered from a single 5V supply. Power dissipation is typically 235 mW including two 75Ω back-matched output loads. The device is packaged in a JEDEC 28-lead PLCC.

The CLC021 SMPTE 259M Digital Video Serializer with EDH Generation and Insertion is a monolithic integrated circuit that encodes, serializes and transmits bit-parallel digital data conforming to SMPTE 125M and 267M component video and SMPTE 244M composite video standards. The CLC021 can also serialize other 8- or 10-bit parallel data. The CLC021 operates at data rates from below 100 Mbps to over 400 Mbps. The serial data clock frequency is internally generated and requires no external frequency setting, trimming or filtering components*. Functions performed by the CLC021 include: parallel-to-serial data conversion, ITU-R BT.601-4 input data clipping, data encoding using the SMPTE polynomial (X9+X4+1), data format conversion from NRZ to NRZI, parallel data clock frequency multiplication and encoding with the serial data, and differential, serial output data driving. The CLC021 has circuitry for automatic EDH character and flag generation and insertion per SMPTE RP-165. The CLC021 has an exclusive built-in self-test (BIST) and video test pattern generator (TPG) with 16 component video test patterns: reference black, PLL and EQ pathologicals and modified colour bars in 4:3 and 16:9 raster formats for NTSC and PAL formats*. The CLC021 has inputs for enabling sync detection, non-SMPTE mode operation, enabling the EDH function, NRZ/NRZI mode control and an external reset control. Outputs are provided for H, V and F bits, new TRS sync character position indication, ancilliary data header detection, NTSC/PAL raster indication and PLL lock detect. Separate power pins for the output driver, VCO and the serializer improve power supply rejection, output jitter and noise performance. The CLC021AVGZ-5.0V is powered by a single +5V supply. The CLC021AVGZ-3.3V is powered by a single +3.3V supply. Power dissipation is typically 235 mW including two 75Ω back-matched output loads. The device is packaged in a JEDEC metric 44-lead PQFP. The CLC021 SMPTE 259M Digital Video Serializer with EDH Generation and Insertion is a monolithic integrated circuit that encodes, serializes and transmits bit-parallel digital data conforming to SMPTE 125M and 267M component video and SMPTE 244M composite video standards. The CLC021 can also serialize other 8- or 10-bit parallel data. The CLC021 operates at data rates from below 100 Mbps to over 400 Mbps. The serial data clock frequency is internally generated and requires no external frequency setting, trimming or filtering components*. Functions performed by the CLC021 include: parallel-to-serial data conversion, ITU-R BT.601-4 input data clipping, data encoding using the SMPTE polynomial (X9+X4+1), data format conversion from NRZ to NRZI, parallel data clock frequency multiplication and encoding with the serial data, and differential, serial output data driving. The CLC021 has circuitry for automatic EDH character and flag generation and insertion per SMPTE RP-165. The CLC021 has an exclusive built-in self-test (BIST) and video test pattern generator (TPG) with 16 component video test patterns: reference black, PLL and EQ pathologicals and modified colour bars in 4:3 and 16:9 raster formats for NTSC and PAL formats*. The CLC021 has inputs for enabling sync detection, non-SMPTE mode operation, enabling the EDH function, NRZ/NRZI mode control and an external reset control. Outputs are provided for H, V and F bits, new TRS sync character position indication, ancilliary data header detection, NTSC/PAL raster indication and PLL lock detect. Separate power pins for the output driver, VCO and the serializer improve power supply rejection, output jitter and noise performance. The CLC021AVGZ-5.0V is powered by a single +5V supply. The CLC021AVGZ-3.3V is powered by a single +3.3V supply. Power dissipation is typically 235 mW including two 75Ω back-matched output loads. The device is packaged in a JEDEC metric 44-lead PQFP.