Texas Instruments

The UCC3580 family of PWM controllers is designed to implement a variety of active clamp/reset and synchronous rectifier switching converter topologies. While containing all the necessary functions for fixed frequency, high performance pulse width modulation, the additional feature of this design is the inclusion of an auxiliary switch driver which complements the main power switch, and with a programmable deadtime or delay between each transition. The active clamp/reset technique allows operation of single ended converters beyond 50% duty cycle while reducing voltage stresses on the switches, and allows a greater flux swing for the power transformer. This approach also allows a reduction in switching losses by recovering energy stored in parasitic elements such as leakage inductance and switch capacitance. The oscillator is programmed with two resistors and a capacitor to set switching frequency and maximum duty cycle. A separate synchronized ramp provides a voltage feedforward pulse width modulation and a programmed maximum volt-second limit. The generated clock from the oscillator contains both frequency and maximum duty cycle information. The main gate drive output (OUT1) is controlled by the pulse width modulator. The second output (OUT2) is intended to activate an auxiliary switch during the off time of the main switch, except that between each transition there is deadtime where both switches are off, programmed by a single external resistor. This design offers two options for OUT2, normal and inverted. In the -1 and -2 versions, OUT2 is normal and can be used to drive PMOS FETs. In the -3 and -4 versions, OUT2 is inverted and can be used to drive NMOS FETs. In all versions, both the main and auxiliary switches are held off prior to startup and when the PWM command goes to zero duty cycle. During fault conditions, OUT1 is held off while OUT2 operates at maximum duty cycle with a guaranteed off time equal to the sum of the two deadtimes. Undervoltage lockout monitors supply voltage (VDD), the precision reference (REF), input line voltage (LINE), and the shutdown comparator (SHTDWN). If after any of these four have sensed a fault condition, recovery to full operation is initiated with a soft start. VDD thresholds, on and off, are 15V and 8.5V for the -2 and -4 versions, 9V and 8.5V for the -1 and -3 versions. The UCC1580-x is specified for operation over the military temperature range of –55°C to 125°C. The UCC2580-x is specified from –40°C to 85°C. The UCC3580-x is specified from 0°C to 70°C. Package options include 16-pin surface mount and dual in-line. The UCC3580 family of PWM controllers is designed to implement a variety of active clamp/reset and synchronous rectifier switching converter topologies. While containing all the necessary functions for fixed frequency, high performance pulse width modulation, the additional feature of this design is the inclusion of an auxiliary switch driver which complements the main power switch, and with a programmable deadtime or delay between each transition. The active clamp/reset technique allows operation of single ended converters beyond 50% duty cycle while reducing voltage stresses on the switches, and allows a greater flux swing for the power transformer. This approach also allows a reduction in switching losses by recovering energy stored in parasitic elements such as leakage inductance and switch capacitance. The oscillator is programmed with two resistors and a capacitor to set switching frequency and maximum duty cycle. A separate synchronized ramp provides a voltage feedforward pulse width modulation and a programmed maximum volt-second limit. The generated clock from the oscillator contains both frequency and maximum duty cycle information. The main gate drive output (OUT1) is controlled by the pulse width modulator. The second output (OUT2) is intended to activate an auxiliary switch during the off time of the main switch, except that between each transition there is deadtime where both switches are off, programmed by a single external resistor. This design offers two options for OUT2, normal and inverted. In the -1 and -2 versions, OUT2 is normal and can be used to drive PMOS FETs. In the -3 and -4 versions, OUT2 is inverted and can be used to drive NMOS FETs. In all versions, both the main and auxiliary switches are held off prior to startup and when the PWM command goes to zero duty cycle. During fault conditions, OUT1 is held off while OUT2 operates at maximum duty cycle with a guaranteed off time equal to the sum of the two deadtimes. Undervoltage lockout monitors supply voltage (VDD), the precision reference (REF), input line voltage (LINE), and the shutdown comparator (SHTDWN). If after any of these four have sensed a fault condition, recovery to full operation is initiated with a soft start. VDD thresholds, on and off, are 15V and 8.5V for the -2 and -4 versions, 9V and 8.5V for the -1 and -3 versions. The UCC1580-x is specified for operation over the military temperature range of –55°C to 125°C. The UCC2580-x is specified from –40°C to 85°C. The UCC3580-x is specified from 0°C to 70°C. Package options include 16-pin surface mount and dual in-line.

The UCC25800-Q1 ultra-low EMI transformer driver integrates the switching power stage, the control, and the protection circuits to simplify isolated bias supply designs. It allows the design to utilize a transformer with higher leakage inductance, but much smaller parasitic primary-to-secondary capacitance. This low-capacitance transformer design enables an order of magnitude reduction in the common-mode current injection through the bias transformer. This makes the transformer driver an ideal solution for the isolated bias supply in various automotive applications to minimize the EMI noise caused by the high-speed switching devices. The soft-switching feature further reduces the EMI noise. The transformer driver has a programmable frequency range of 100 kHz to 1.2 MHz. This high switching frequency reduces the transformer size and footprint, as well as the overall cost of the bias supply. The integrated SYNC function allows the system bias supplies to synchronize with an external clock signal, further reducing the system level noise. The dead-time adjusts automatically to minimize the conduction loss and simplify the design. The programmable maximum dead-time ensures power stage design flexibility. With the integrated, low-resistance switching power stage, the transformer driver can achieve a 6-W design with 24-V input, and up to 9-W from 34-V input. With a fixed input voltage, the open-loop control also helps the output regulation to remain ±5% when the load is above 10%. The programmable overcurrent protection (OCP) allows flexibility on the power stage design to minimize the transformer size. The protection features such as adjustable OCP, input OVP, TSD and the protection from pin faults ensure robust operation. A fixed 1.5-ms soft-start period reduces the inrush current during start-up and fault recovery. The transformer driver also provides a dedicated multi-function pin for external disabling, and fault code reporting. The fault code reporting sends the fault code once the bias supply is in the protection mode. The UCC25800-Q1 transformer driver is offered in an 8-pin DGN package with the thermal pad to enhance its thermal handling capability. The UCC25800-Q1 ultra-low EMI transformer driver integrates the switching power stage, the control, and the protection circuits to simplify isolated bias supply designs. It allows the design to utilize a transformer with higher leakage inductance, but much smaller parasitic primary-to-secondary capacitance. This low-capacitance transformer design enables an order of magnitude reduction in the common-mode current injection through the bias transformer. This makes the transformer driver an ideal solution for the isolated bias supply in various automotive applications to minimize the EMI noise caused by the high-speed switching devices. The soft-switching feature further reduces the EMI noise. The transformer driver has a programmable frequency range of 100 kHz to 1.2 MHz. This high switching frequency reduces the transformer size and footprint, as well as the overall cost of the bias supply. The integrated SYNC function allows the system bias supplies to synchronize with an external clock signal, further reducing the system level noise. The dead-time adjusts automatically to minimize the conduction loss and simplify the design. The programmable maximum dead-time ensures power stage design flexibility. With the integrated, low-resistance switching power stage, the transformer driver can achieve a 6-W design with 24-V input, and up to 9-W from 34-V input. With a fixed input voltage, the open-loop control also helps the output regulation to remain ±5% when the load is above 10%. The programmable overcurrent protection (OCP) allows flexibility on the power stage design to minimize the transformer size. The protection features such as adjustable OCP, input OVP, TSD and the protection from pin faults ensure robust operation. A fixed 1.5-ms soft-start period reduces the inrush current during start-up and fault recovery. The transformer driver also provides a dedicated multi-function pin for external disabling, and fault code reporting. The fault code reporting sends the fault code once the bias supply is in the protection mode. The UCC25800-Q1 transformer driver is offered in an 8-pin DGN package with the thermal pad to enhance its thermal handling capability.

The UCC3583 is a synchronizable secondary side post regulator for precision regulation of the auxiliary outputs of multiple output power supplies. It contains a leading edge pulse width modulator, which generates the gate drive signal for a FET power switch connected in series with the rectifying diode. The turn-on of the power switch is delayed from the leading edge of the secondary power pulse to regulate the output voltage. The UCC3583 contains a ramp generator slaved to the secondary power pulse, a voltage error amplifier, a current error amplifier, a PWM comparator and associated logic, a gate driver, a precision reference, and protection circuitry. The ramp discharge and termination of the gate drive signal are triggered by the synchronization pulse, typically derived from the falling edge of the transformer secondary voltage. The ramp starts charging again once its low threshold is reached. The gate drive signal is turned on when the ramp voltage exceeds the control voltage. This leading edge modulation technique prevents instability when the UCC3583 is used in peak current mode primary controlled systems. The controller operates from a floating power supply referenced to the output voltage being controlled. It features an undervoltage lockout (UVLO) circuit, a soft start circuit, and an averaging current limit amplifier. The current limit can be programmed to be proportional to the output voltage, thus achieving foldback operation to minimize the dissipation under short circuit conditions. The UCC3583 is a synchronizable secondary side post regulator for precision regulation of the auxiliary outputs of multiple output power supplies. It contains a leading edge pulse width modulator, which generates the gate drive signal for a FET power switch connected in series with the rectifying diode. The turn-on of the power switch is delayed from the leading edge of the secondary power pulse to regulate the output voltage. The UCC3583 contains a ramp generator slaved to the secondary power pulse, a voltage error amplifier, a current error amplifier, a PWM comparator and associated logic, a gate driver, a precision reference, and protection circuitry. The ramp discharge and termination of the gate drive signal are triggered by the synchronization pulse, typically derived from the falling edge of the transformer secondary voltage. The ramp starts charging again once its low threshold is reached. The gate drive signal is turned on when the ramp voltage exceeds the control voltage. This leading edge modulation technique prevents instability when the UCC3583 is used in peak current mode primary controlled systems. The controller operates from a floating power supply referenced to the output voltage being controlled. It features an undervoltage lockout (UVLO) circuit, a soft start circuit, and an averaging current limit amplifier. The current limit can be programmed to be proportional to the output voltage, thus achieving foldback operation to minimize the dissipation under short circuit conditions.

The UCC3626 motor controller device combines many of the functions required to design a high-performance, two- or four-quadrant, three-phase, brushless dc motor controller into one package. Rotor position inputs are decoded to provide six outputs that control an external power stage. A precision triangle oscillator and latched comparator provide PWM motor control in either voltage- or current-mode configurations. The oscillator is easily synchronized to an external master clock source via the SYNCH input. Additionally, a QUAD select input configures the chip to modulate either the low-side switches only, or both upper and lower switches, allowing the user to minimize switching losses in less demanding two-quadrant applications. The device includes a differential current-sense amplifier and absolute-value circuit which provide an accurate reconstruction of motor current, useful for pulse-by-pulse overcurrent protection, as well as closing a current control loop. A precision tachometer is also provided for implementing closed-loop speed control. The TACH_OUT signal is a variable duty-cycle, frequency output, which can be used directly for digital control or filtered to provide an analog feedback signal. Other features include COAST, BRAKE, and DIR_IN commands, along with a direction output, DIR_OUT. The UCC3626 motor controller device combines many of the functions required to design a high-performance, two- or four-quadrant, three-phase, brushless dc motor controller into one package. Rotor position inputs are decoded to provide six outputs that control an external power stage. A precision triangle oscillator and latched comparator provide PWM motor control in either voltage- or current-mode configurations. The oscillator is easily synchronized to an external master clock source via the SYNCH input. Additionally, a QUAD select input configures the chip to modulate either the low-side switches only, or both upper and lower switches, allowing the user to minimize switching losses in less demanding two-quadrant applications. The device includes a differential current-sense amplifier and absolute-value circuit which provide an accurate reconstruction of motor current, useful for pulse-by-pulse overcurrent protection, as well as closing a current control loop. A precision tachometer is also provided for implementing closed-loop speed control. The TACH_OUT signal is a variable duty-cycle, frequency output, which can be used directly for digital control or filtered to provide an analog feedback signal. Other features include COAST, BRAKE, and DIR_IN commands, along with a direction output, DIR_OUT.

The UCC2720xA family of high-frequency N-channel MOSFET drivers include a 120V bootstrap diode and high-side/low-side driver with independent inputs for maximum control flexibility. This allows for N-channel MOSFET control in half-bridge, full-bridge, two-switch forward and active clamp forward converters. The low-side and the high-side gate drivers are independently controlled and matched to 1ns between the turn-on and turn-off of each other. In order to improve performance in noisy power supply environments the UCC2720xA has an enhanced ESD input structure and also has the ability to withstand a maximum of –18V on its HS pin. An on-chip bootstrap diode eliminates the external discrete diodes. Under-voltage lockout is provided for both the high-side and the low-side drivers forcing the outputs low if the drive voltage is below the specified threshold. Two versions of the UCC2720xA are offered. The UCC27200A has high-noise immune CMOS input thresholds while the UCC27201A has TTL-compatible thresholds. The UCC2720xA family of high-frequency N-channel MOSFET drivers include a 120V bootstrap diode and high-side/low-side driver with independent inputs for maximum control flexibility. This allows for N-channel MOSFET control in half-bridge, full-bridge, two-switch forward and active clamp forward converters. The low-side and the high-side gate drivers are independently controlled and matched to 1ns between the turn-on and turn-off of each other. In order to improve performance in noisy power supply environments the UCC2720xA has an enhanced ESD input structure and also has the ability to withstand a maximum of –18V on its HS pin. An on-chip bootstrap diode eliminates the external discrete diodes. Under-voltage lockout is provided for both the high-side and the low-side drivers forcing the outputs low if the drive voltage is below the specified threshold. Two versions of the UCC2720xA are offered. The UCC27200A has high-noise immune CMOS input thresholds while the UCC27201A has TTL-compatible thresholds.

The UCC2720xA family of high-frequency N-channel MOSFET drivers include a 120V bootstrap diode and high-side/low-side driver with independent inputs for maximum control flexibility. This allows for N-channel MOSFET control in half-bridge, full-bridge, two-switch forward and active clamp forward converters. The low-side and the high-side gate drivers are independently controlled and matched to 1ns between the turn-on and turn-off of each other. In order to improve performance in noisy power supply environments the UCC2720xA has an enhanced ESD input structure and also has the ability to withstand a maximum of –18V on its HS pin. An on-chip bootstrap diode eliminates the external discrete diodes. Under-voltage lockout is provided for both the high-side and the low-side drivers forcing the outputs low if the drive voltage is below the specified threshold. Two versions of the UCC2720xA are offered. The UCC27200A has high-noise immune CMOS input thresholds while the UCC27201A has TTL-compatible thresholds. The UCC2720xA family of high-frequency N-channel MOSFET drivers include a 120V bootstrap diode and high-side/low-side driver with independent inputs for maximum control flexibility. This allows for N-channel MOSFET control in half-bridge, full-bridge, two-switch forward and active clamp forward converters. The low-side and the high-side gate drivers are independently controlled and matched to 1ns between the turn-on and turn-off of each other. In order to improve performance in noisy power supply environments the UCC2720xA has an enhanced ESD input structure and also has the ability to withstand a maximum of –18V on its HS pin. An on-chip bootstrap diode eliminates the external discrete diodes. Under-voltage lockout is provided for both the high-side and the low-side drivers forcing the outputs low if the drive voltage is below the specified threshold. Two versions of the UCC2720xA are offered. The UCC27200A has high-noise immune CMOS input thresholds while the UCC27201A has TTL-compatible thresholds.