TPS749013-A, low-VIN (0.8-V) adjustable ultra-low-dropout voltage regulator with power good and enable | Evaluation Boards | 10 | Active | The TPS74901 low-dropout (LDO) linear regulator provides an easy-to-use, robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current during start-up. The soft-start is monotonic and designed for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility allows a solution to be configured that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with special start-up requirements.
A precision reference and error amplifier deliver 2% accuracy over load, line, temperature, and process. The device is stable with any type of capacitor ≥ 2.2µF, and the device is fully specified from –40°C to +125°C. The TPS74901 is offered in a small (3mm × 3mm) VSON package and a small (5mm × 5mm) VQFN package, yielding a highly compact total solution size. The device is also available in a DDPAK-7 package.
The TPS74901 low-dropout (LDO) linear regulator provides an easy-to-use, robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current during start-up. The soft-start is monotonic and designed for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility allows a solution to be configured that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with special start-up requirements.
A precision reference and error amplifier deliver 2% accuracy over load, line, temperature, and process. The device is stable with any type of capacitor ≥ 2.2µF, and the device is fully specified from –40°C to +125°C. The TPS74901 is offered in a small (3mm × 3mm) VSON package and a small (5mm × 5mm) VQFN package, yielding a highly compact total solution size. The device is also available in a DDPAK-7 package. |
| Evaluation and Demonstration Boards and Kits | 1 | Obsolete | |
TPS75003Enhanced Product Triple-Supply Power Management IC (PMIC) For Powering FPGAs and DSPs | Integrated Circuits (ICs) | 6 | Active | The TPS75003 is a complete power management solution for FPGA, DSP and other multi-supply applications. The device has been tested with and meets all of the Xilinx Spartan-3, Spartan-3E, and Spartan-3L start-up profile requirements, including monotonic voltage ramp and minimum voltage-rail rise time. Independent enables for each output allow sequencing to minimize demand on the power supply at start-up. Soft-start on each supply limits inrush current during start-up. Two integrated buck controllers allow efficient, cost-effective voltage conversion for both low and high current supplies such as core and I/O. A 300-mA LDO is integrated to provide an auxiliary rail such as VCCAUXon the Xilinx Spartan-3 FPGA. All three output voltages are externally configurable for maximum flexibility.
The TPS75003 is fully specified from –40°C to +85°C and is offered in a VQFN package, yielding a highly compact total solution size with high power dissipation capability.
The TPS75003 is a complete power management solution for FPGA, DSP and other multi-supply applications. The device has been tested with and meets all of the Xilinx Spartan-3, Spartan-3E, and Spartan-3L start-up profile requirements, including monotonic voltage ramp and minimum voltage-rail rise time. Independent enables for each output allow sequencing to minimize demand on the power supply at start-up. Soft-start on each supply limits inrush current during start-up. Two integrated buck controllers allow efficient, cost-effective voltage conversion for both low and high current supplies such as core and I/O. A 300-mA LDO is integrated to provide an auxiliary rail such as VCCAUXon the Xilinx Spartan-3 FPGA. All three output voltages are externally configurable for maximum flexibility.
The TPS75003 is fully specified from –40°C to +85°C and is offered in a VQFN package, yielding a highly compact total solution size with high power dissipation capability. |
| Power Management - Specialized | 2 | NRND | |
TPS7511.5-A, ultra-low-dropout voltage regulator with low-IQ & power good | Voltage Regulators - Linear, Low Drop Out (LDO) Regulators | 10 | Active | The TPS753xxQ and TPS751xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. These devices are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled whenENis connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal toEN(enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ= +25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output for use with a power-on reset or a low-battery indicator.
TheRESET(SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage,RESETgoes to a high-impedance state after a 100-ms delay.RESETgoes to a logic-low state when the regulated output voltage is pulled below 95% (that is, during an overload condition) of its regulated voltage.
The TPS751xxQ and TPS753xxQ are offered in 1.5 V, 1.8 V, 2.5 V and 3.3 V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in a 20-pin TSSOP (PWP) package.
The TPS753xxQ and TPS751xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. These devices are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled whenENis connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal toEN(enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ= +25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output for use with a power-on reset or a low-battery indicator.
TheRESET(SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage,RESETgoes to a high-impedance state after a 100-ms delay.RESETgoes to a logic-low state when the regulated output voltage is pulled below 95% (that is, during an overload condition) of its regulated voltage.
The TPS751xxQ and TPS753xxQ are offered in 1.5 V, 1.8 V, 2.5 V and 3.3 V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in a 20-pin TSSOP (PWP) package. |
| Power Management (PMIC) | 4 | Active | |
| Power Management (PMIC) | 2 | Active | |
| Power Management (PMIC) | 6 | Active | |
TPS75125Enhanced product, fast-transient response 1.5-A LDO regulator with power good | Voltage Regulators - Linear, Low Drop Out (LDO) Regulators | 2 | Active | TPS75125-EP is a low-dropout regulator with a power good (PG) function. Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS75125-EP is designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when the enable (EN) input is connected to a low-level voltage. This low dropout (LDO) device also features a sleep mode; applying a TTL high signal toENshuts down the regulator, reducing the quiescent current to less than 1 µA at TJ= 25°C.
The TPS75125-EP power good (PG) terminal is an active-high, open-drain output that can be used to implement a power-on reset or a low-battery indicator.
The TPS75125-EP is offered in a 2.5 V fixed-voltage version. Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS75125-EP is available in a 20-pin TSSOP (PWP) package.
TPS75125-EP is a low-dropout regulator with a power good (PG) function. Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS75125-EP is designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when the enable (EN) input is connected to a low-level voltage. This low dropout (LDO) device also features a sleep mode; applying a TTL high signal toENshuts down the regulator, reducing the quiescent current to less than 1 µA at TJ= 25°C.
The TPS75125-EP power good (PG) terminal is an active-high, open-drain output that can be used to implement a power-on reset or a low-battery indicator.
The TPS75125-EP is offered in a 2.5 V fixed-voltage version. Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS75125-EP is available in a 20-pin TSSOP (PWP) package. |
| Power Management (PMIC) | 10 | Active | |
