Texas Instruments

The ADS6445/ADS6444 is a high performance 14 bit 125/105 MSPS quad channel A-D converter. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5 dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1 dB steps up to 6 dB. The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1 Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies. An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14 bit data from each channel. In addition to the serial data streams, the frame and bit clocks also are transmitted as LVDS outputs. The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye openings and improve signal integrity, easing capture by the receiver. The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary. The ADS644X has internal references, but also can support an external reference mode. The device is specified over –55°C to 125°C operating junction temperature range. The ADS6445/ADS6444 is a high performance 14 bit 125/105 MSPS quad channel A-D converter. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5 dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1 dB steps up to 6 dB. The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1 Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies. An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14 bit data from each channel. In addition to the serial data streams, the frame and bit clocks also are transmitted as LVDS outputs. The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye openings and improve signal integrity, easing capture by the receiver. The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary. The ADS644X has internal references, but also can support an external reference mode. The device is specified over –55°C to 125°C operating junction temperature range.

The ADS6445/ADS6444/ADS6443/ADS6442 (ADS644X) is a family of high performance 14-bit 125/105/80/65 MSPS quad channel A-D converters. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1dB steps up to 6dB. The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies. An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14-bit data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs. The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye-openings and improve signal integrity, easing capture by the receiver. The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary. The ADS644X has internal references, but can also support an external reference mode. The device is specified over the industrial temperature range (–40°C to 85°C). The ADS6445/ADS6444/ADS6443/ADS6442 (ADS644X) is a family of high performance 14-bit 125/105/80/65 MSPS quad channel A-D converters. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1dB steps up to 6dB. The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies. An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14-bit data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs. The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye-openings and improve signal integrity, easing capture by the receiver. The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary. The ADS644X has internal references, but can also support an external reference mode. The device is specified over the industrial temperature range (–40°C to 85°C).

The ADS7029-Q1 device is a an automotive Q100-qualified, 8-bit, 2-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (2.35 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7029-Q1 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V). The ADS7029-Q1 is available in an 8-pin, miniature, VSSOP package and is specified for operation from –40°C to +125°C. The fast sampling rate of the ADS7029-Q1, along with miniature form-factor and low-power consumption, makes this device suitable for space-constrained and fast-scanning automotive applications. The ADS7029-Q1 device is a an automotive Q100-qualified, 8-bit, 2-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (2.35 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7029-Q1 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V). The ADS7029-Q1 is available in an 8-pin, miniature, VSSOP package and is specified for operation from –40°C to +125°C. The fast sampling rate of the ADS7029-Q1, along with miniature form-factor and low-power consumption, makes this device suitable for space-constrained and fast-scanning automotive applications.

The ADS7039-Q1 device is a an automotive Q100-qualified, 10-bit, 2-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (2.35 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7039-Q1 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V). The ADS7039-Q1 is available in an 8-pin, miniature, VSSOP package and is specified for operation from –40°C to +125°C. The fast sampling rate of the ADS7039-Q1, along with miniature form-factor and low-power consumption, makes this device suitable for space-constrained and fast-scanning automotive applications. The ADS7039-Q1 device is a an automotive Q100-qualified, 10-bit, 2-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (2.35 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7039-Q1 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V). The ADS7039-Q1 is available in an 8-pin, miniature, VSSOP package and is specified for operation from –40°C to +125°C. The fast sampling rate of the ADS7039-Q1, along with miniature form-factor and low-power consumption, makes this device suitable for space-constrained and fast-scanning automotive applications.

The ADS7040 is a 8-bit, 1-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (1.65 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7040 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V). The ADS7040 is available in 8-pin, miniature, leaded, and X2QFN packages and is specified for operation from –40°C to 125°C. Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained, battery-powered applications. The ADS7040 is a 8-bit, 1-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (1.65 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7040 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V). The ADS7040 is available in 8-pin, miniature, leaded, and X2QFN packages and is specified for operation from –40°C to 125°C. Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained, battery-powered applications.

The ADS7042 is a 12-bit, 1-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (1.65 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7042 complies with the JESD8-7A standard for normal DVDD range (1.65 V to 1.95 V). The ADS7042 is available in 8-pin, miniature, leaded, and X2QFN packages and is specified for operation from –40°C to 125°C. Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained, battery-powered applications. The ADS7042 is a 12-bit, 1-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (1.65 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7042 complies with the JESD8-7A standard for normal DVDD range (1.65 V to 1.95 V). The ADS7042 is available in 8-pin, miniature, leaded, and X2QFN packages and is specified for operation from –40°C to 125°C. Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained, battery-powered applications.

The ADS7043 is a 1-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (±0.825 V to ±1.8 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The device complies with the JESD8-7A standard for normal DVDD range (1.65 V to 1.95 V). The device is available in 8-pin, miniature, leaded, and X2QFN packages and is specified for operation from –40°C to 125°C. Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained, battery-powered applications. The ADS7043 is a 1-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (±0.825 V to ±1.8 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by theCSand SCLK signals. The input signal is sampled with theCSfalling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The device complies with the JESD8-7A standard for normal DVDD range (1.65 V to 1.95 V). The device is available in 8-pin, miniature, leaded, and X2QFN packages and is specified for operation from –40°C to 125°C. Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained, battery-powered applications.