Texas Instruments

The SN65C3232 and SN75C3232 consist of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin-to-pin (serial-port connection pins, including GND). These devices provide the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operate at typical data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/µs to 150 V/µs. spacer spacer The SN65C3232 and SN75C3232 consist of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin-to-pin (serial-port connection pins, including GND). These devices provide the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operate at typical data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/µs to 150 V/µs. spacer spacer

The SN65C3238E and SN75C3238E consist of five line drivers, three line receivers, and a dual charge-pump circuit with ±15-kV ESD (HBM) protection on the driver output (DOUT) and receiver input (RIN) terminals. The devices meet the requirements of TIA/EIA-232-F and provide the electrical interface between notebook and subnotebook computer applications. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In addition, the devices include an always-active noninverting output (ROUT1B), which allows applications using the ring indicator to transmit data while the device is powered down. These devices operate at data signaling rates up to 250 kbit/s and a maximum of 30-V/µs driver output slew rate. Flexible control options for power management are featured when the serial port and driver inputs are inactive. The auto-powerdown plus feature functions when FORCEON is low andFORCEOFFis high. During this mode of operation, if the devices do not sense valid signal transitions on all receiver and driver inputs for approximately 30 s, the built-in charge pump and drivers are powered down, reducing the supply current to 1 µA. By disconnecting the serial port or placing the peripheral drivers off, auto-powerdown plus occurs if there is no activity in the logic levels for the driver inputs. Auto-powerdown plus can be disabled when FORCEON andFORCEOFFare high. With auto-powerdown plus enabled, the devices activate automatically when a valid signal is applied to any receiver or driver input.INVALIDis high (valid data) if any receiver input voltage is greater than 2.7 V or less than -2.7 V, or has been between -0.3 V and 0.3 V for less than 30 µs.INVALIDis low (invalid data) if all receiver input voltages are between -0.3 V and 0.3 V for more than 30 µs. Refer to Figure 5 for receiver input levels. The SN65C3238E and SN75C3238E consist of five line drivers, three line receivers, and a dual charge-pump circuit with ±15-kV ESD (HBM) protection on the driver output (DOUT) and receiver input (RIN) terminals. The devices meet the requirements of TIA/EIA-232-F and provide the electrical interface between notebook and subnotebook computer applications. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In addition, the devices include an always-active noninverting output (ROUT1B), which allows applications using the ring indicator to transmit data while the device is powered down. These devices operate at data signaling rates up to 250 kbit/s and a maximum of 30-V/µs driver output slew rate. Flexible control options for power management are featured when the serial port and driver inputs are inactive. The auto-powerdown plus feature functions when FORCEON is low andFORCEOFFis high. During this mode of operation, if the devices do not sense valid signal transitions on all receiver and driver inputs for approximately 30 s, the built-in charge pump and drivers are powered down, reducing the supply current to 1 µA. By disconnecting the serial port or placing the peripheral drivers off, auto-powerdown plus occurs if there is no activity in the logic levels for the driver inputs. Auto-powerdown plus can be disabled when FORCEON andFORCEOFFare high. With auto-powerdown plus enabled, the devices activate automatically when a valid signal is applied to any receiver or driver input.INVALIDis high (valid data) if any receiver input voltage is greater than 2.7 V or less than -2.7 V, or has been between -0.3 V and 0.3 V for less than 30 µs.INVALIDis low (invalid data) if all receiver input voltages are between -0.3 V and 0.3 V for more than 30 µs. Refer to Figure 5 for receiver input levels.

The SN65C3243 and SN75C3243 consist of three line drivers, five line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). This device provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In addition, this device includes an always-active noninverting output (ROUT2B), which allows applications using the ring indicator to transmit data while the device is powered down. The device operates at data signaling rates up to 1 Mbit/s and an increased slew-rate range of 24 V/µs to 150 V/µs. The SN65C3243 and SN75C3243 consist of three line drivers, five line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). This device provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In addition, this device includes an always-active noninverting output (ROUT2B), which allows applications using the ring indicator to transmit data while the device is powered down. The device operates at data signaling rates up to 1 Mbit/s and an increased slew-rate range of 24 V/µs to 150 V/µs.

The SN75DP118 is a one Dual-Mode DisplayPort input to one Dual-Mode DisplayPort output. The output follows the input signal in a manner that provides the highest level of signal integrity while supporting the EMI benefits of spread spectrum clocking. The SN75DP118 data rates of up to 2.7 Gbps through each link for a total throughput of up to 10.8 Gbps can be realized. In addition to the DisplayPort high speed signal lines, the SN75DP118 also supports the Hot Plug Detect (HPD) and Cable Adapter Detect (CAD) channels. The SN75DP118 is characterized for operation over ambient air temperature of 0°C to 85°C. The SN75DP118 is a one Dual-Mode DisplayPort input to one Dual-Mode DisplayPort output. The output follows the input signal in a manner that provides the highest level of signal integrity while supporting the EMI benefits of spread spectrum clocking. The SN75DP118 data rates of up to 2.7 Gbps through each link for a total throughput of up to 10.8 Gbps can be realized. In addition to the DisplayPort high speed signal lines, the SN75DP118 also supports the Hot Plug Detect (HPD) and Cable Adapter Detect (CAD) channels. The SN75DP118 is characterized for operation over ambient air temperature of 0°C to 85°C.

The SN75DP119 is a 1-lane or 2-lane embedded DisplayPort (eDP) repeater that regenerates the DP high speed digital link. The device compensates for pcb related frequency loss and signal reflections. This is especially helpful in designs with long pcb traces or when there is a FET switch in the signal path. Four levels of differential output voltage swing (VOD) and any combination of pre-emphasis using these VODlevels are supported. The output swing and pre-emphasis are configured through device control inputs. The available output swing levels are 300mVPP, 400mVPP, 600mVPPor 750mVPP. Therefore, the output pre-emphasis level can be configured to 0dB, 2.0dB, 2,5dB, 3.5dB, 5.5dB, 6dB, or 8dB. This is a good solution for embedded link applications, such as the connection from the GPU to the notebook internal panel. To adjust the output signal level adaptively during link training, the implementation needs to control the device control inputs. The SN75DP119 supports programmable integrated receiver equalization circuitry. This equalization circuitry can be used to help improve signal integrity in applications where the input link has a high level of insertion loss. The equalizer can be set to 3dB or 6dB equalization. The equalizer can also be turned off. The device is characterized for an extended operational temperature range from –40°C to 85°C. The SN75DP119 consumes between 64mW and 175mW depending on the selected mode of operation. The device also supports an ultra low power standby mode. In this mode, the outputs are disabled and the device draws less then 700µW of power. The SN75DP119 is a 1-lane or 2-lane embedded DisplayPort (eDP) repeater that regenerates the DP high speed digital link. The device compensates for pcb related frequency loss and signal reflections. This is especially helpful in designs with long pcb traces or when there is a FET switch in the signal path. Four levels of differential output voltage swing (VOD) and any combination of pre-emphasis using these VODlevels are supported. The output swing and pre-emphasis are configured through device control inputs. The available output swing levels are 300mVPP, 400mVPP, 600mVPPor 750mVPP. Therefore, the output pre-emphasis level can be configured to 0dB, 2.0dB, 2,5dB, 3.5dB, 5.5dB, 6dB, or 8dB. This is a good solution for embedded link applications, such as the connection from the GPU to the notebook internal panel. To adjust the output signal level adaptively during link training, the implementation needs to control the device control inputs. The SN75DP119 supports programmable integrated receiver equalization circuitry. This equalization circuitry can be used to help improve signal integrity in applications where the input link has a high level of insertion loss. The equalizer can be set to 3dB or 6dB equalization. The equalizer can also be turned off. The device is characterized for an extended operational temperature range from –40°C to 85°C. The SN75DP119 consumes between 64mW and 175mW depending on the selected mode of operation. The device also supports an ultra low power standby mode. In this mode, the outputs are disabled and the device draws less then 700µW of power.

The SN75DP120 is a single port Dual-Mode DisplayPort (DP++) repeater that regenerates the DP high speed digital link. Four levels of differential output voltage swing (VOD) and four levels of pre-emphasis are supported in accordance with the DisplayPort specification version 1.1a.The device monitors the AUX channel and automatically adjusts the output signaling levels in response to link training commands. The SN75DP120 also supports multiple selectable levels of equalization to provide improved signal integrity in cases where the input link has a high level of loss. The equalization level will be automatically selected based on link training. The equalization in the DP120 is optimized to compensate losses of up to 6dB for frequencies up to 1.35GHz. This corresponds to approximately 18–24 inches of FR4 trace with 4–6mil width. A built in level translator for the hot plug detect (HPD) line and level translator / inverter for the cable adapter detect line (CAD) allow for a reduction of the overall circuitry needed for a DisplayPort source system. When not in use, the SN75DP120 device supports an ultra low power shutdown mode. In this mode the main link outputs are disabled and pulled to GND, and the device draws less then 40 µW of power. The device is characterized for an extended operational temperature range from 0°C to 85°C. The SN75DP120 is a single port Dual-Mode DisplayPort (DP++) repeater that regenerates the DP high speed digital link. Four levels of differential output voltage swing (VOD) and four levels of pre-emphasis are supported in accordance with the DisplayPort specification version 1.1a.The device monitors the AUX channel and automatically adjusts the output signaling levels in response to link training commands. The SN75DP120 also supports multiple selectable levels of equalization to provide improved signal integrity in cases where the input link has a high level of loss. The equalization level will be automatically selected based on link training. The equalization in the DP120 is optimized to compensate losses of up to 6dB for frequencies up to 1.35GHz. This corresponds to approximately 18–24 inches of FR4 trace with 4–6mil width. A built in level translator for the hot plug detect (HPD) line and level translator / inverter for the cable adapter detect line (CAD) allow for a reduction of the overall circuitry needed for a DisplayPort source system. When not in use, the SN75DP120 device supports an ultra low power shutdown mode. In this mode the main link outputs are disabled and pulled to GND, and the device draws less then 40 µW of power. The device is characterized for an extended operational temperature range from 0°C to 85°C.

The SN75DP122A is a one Dual-Mode DisplayPort input to one Dual-Mode DisplayPort output or one TMDS output. The TMDS output has a built in level translator compliant with Digital Video Interface (DVI) 1.0 and High Definition Multimedia Interface (HDMI) 1.3b. The DisplayPort output follows the input signal in a manner that provides the highest level of signal integrity while supporting the EMI benefits of spread spectrum clocking. Through the SN75DP122A data rates of up to 2.7 Gbps through each link for a total throughput of up to 10.8 Gbps can be realized. The SN75DP122A supports Display Port Spec 1.1a In addition to the switching of the DisplayPort high speed signal lines, the SN75DP122A also supports the switching of the bidirectional auxiliary (AUX), Hot Plug Detect (HPD), and Cable Adapter Detect (CAD) channels. The Auxiliary differential pair supports Dual-Mode DisplayPort operation through the DisplayPort port. Through the TMDS port the auxiliary port is configured as an I2C port with an integrated I2C repeater. The SN75DP122A is characterized for operation over ambient air temperature of 0°C to 85°C. The SN75DP122A is a one Dual-Mode DisplayPort input to one Dual-Mode DisplayPort output or one TMDS output. The TMDS output has a built in level translator compliant with Digital Video Interface (DVI) 1.0 and High Definition Multimedia Interface (HDMI) 1.3b. The DisplayPort output follows the input signal in a manner that provides the highest level of signal integrity while supporting the EMI benefits of spread spectrum clocking. Through the SN75DP122A data rates of up to 2.7 Gbps through each link for a total throughput of up to 10.8 Gbps can be realized. The SN75DP122A supports Display Port Spec 1.1a In addition to the switching of the DisplayPort high speed signal lines, the SN75DP122A also supports the switching of the bidirectional auxiliary (AUX), Hot Plug Detect (HPD), and Cable Adapter Detect (CAD) channels. The Auxiliary differential pair supports Dual-Mode DisplayPort operation through the DisplayPort port. Through the TMDS port the auxiliary port is configured as an I2C port with an integrated I2C repeater. The SN75DP122A is characterized for operation over ambient air temperature of 0°C to 85°C.

The SN75DP126 switches one Dual-Mode DisplayPort (DP++) input to one Dual-Mode DisplayPort (DP++) sink output or one HDMI/DVI sink output. The HDMI/DVI output has a built-in level translator compliant with DVI 1.0 and HDMI 1.4b standard TMDS signaling, and is specified up to a maximum data rate of 3.4 Gbps, supporting resolutions greater than 1920 X 1440 and HDTV deep color at 1080p. An integrated DP-HDMI Adaptor ID buffer can be accessed when the HDMI/DVI sink is selected to indicate support for HDMI signaling. The device compensates for PCB-related frequency loss and switching-related loss to provide the optimum electrical performance from source to sink. The DP++ Main Link signal inputs feature-configurable equalizers with selectable boost settings. At the SN75DP126 DP++ Main Link output, four primary levels of differential output voltage (VOD) swing and four primary levels of pre-emphasis are available as well as a secondary level of boost adjustment, programmed through I2C, for fine-tuning the Main Link output. The device can monitor the AUX channel and automatically adjust output signaling levels and input equalizers based on DP Link Training commands. The SN75DP126 offers separate AUX and DDC source interfaces that connect to the DisplayPort AUX sink channel and the HDMI DDC sink channel, that seamlessly interface to graphics processor (GPU) comprising separate DDC and AUX interfaces as well as GPUs with combined DDC/AUX. Other sideband circuits such as Hot Plug Detect (HPD) are optimized to reduce external components providing a seamless connection to Intel, AMD, and NVIDIA graphics processors. The SN75DP126 is optimized for mobile applications, and contains activity-detection circuitry on the DP++ Main Link input that transitions to a low-power Output Disable mode in the absence of a valid input signal. Other low power modes are supported, including a Standby mode with typical dissipation of ~2 mW when no video sink (for example, monitor) is connected. The device is characterized for an extended operational temperature range from 0°C to 85°C. At the SN75DP126 HDMI/DVI output, the differential output voltage swing and pre-emphasis levels are configurable. The SN75DP126 output signal conditioning and EQ parameters are programmable through the I2C interface, the VSadj terminal, and the I2C_CTL_EN terminal. The HDMI/DVI sink TMDS output slew rate is controlled by the SRC control input. The SN75DP126 switches one Dual-Mode DisplayPort (DP++) input to one Dual-Mode DisplayPort (DP++) sink output or one HDMI/DVI sink output. The HDMI/DVI output has a built-in level translator compliant with DVI 1.0 and HDMI 1.4b standard TMDS signaling, and is specified up to a maximum data rate of 3.4 Gbps, supporting resolutions greater than 1920 X 1440 and HDTV deep color at 1080p. An integrated DP-HDMI Adaptor ID buffer can be accessed when the HDMI/DVI sink is selected to indicate support for HDMI signaling. The device compensates for PCB-related frequency loss and switching-related loss to provide the optimum electrical performance from source to sink. The DP++ Main Link signal inputs feature-configurable equalizers with selectable boost settings. At the SN75DP126 DP++ Main Link output, four primary levels of differential output voltage (VOD) swing and four primary levels of pre-emphasis are available as well as a secondary level of boost adjustment, programmed through I2C, for fine-tuning the Main Link output. The device can monitor the AUX channel and automatically adjust output signaling levels and input equalizers based on DP Link Training commands. The SN75DP126 offers separate AUX and DDC source interfaces that connect to the DisplayPort AUX sink channel and the HDMI DDC sink channel, that seamlessly interface to graphics processor (GPU) comprising separate DDC and AUX interfaces as well as GPUs with combined DDC/AUX. Other sideband circuits such as Hot Plug Detect (HPD) are optimized to reduce external components providing a seamless connection to Intel, AMD, and NVIDIA graphics processors. The SN75DP126 is optimized for mobile applications, and contains activity-detection circuitry on the DP++ Main Link input that transitions to a low-power Output Disable mode in the absence of a valid input signal. Other low power modes are supported, including a Standby mode with typical dissipation of ~2 mW when no video sink (for example, monitor) is connected. The device is characterized for an extended operational temperature range from 0°C to 85°C. At the SN75DP126 HDMI/DVI output, the differential output voltage swing and pre-emphasis levels are configurable. The SN75DP126 output signal conditioning and EQ parameters are programmable through the I2C interface, the VSadj terminal, and the I2C_CTL_EN terminal. The HDMI/DVI sink TMDS output slew rate is controlled by the SRC control input.

The SN75DP128A is a one Dual-Mode DisplayPort input to one of two Dual-Mode DisplayPort outputs. The outputs will follow the input signal in a manner that provides the highest level of signal integrity while supporting the EMI benefits of spread spectrum clocking. Through the SN75DP128A data rates of up to 2.7Gbps through each link for a total throughput of up to 10.8Gbps can be realized. The SN75DP128A supports Display Port Spec 1.1a. In addition to the switching of the DisplayPort high speed signal lines, the SN75DP128A also supports the switching of the bi-directional auxiliary (AUX), Hot Plug Detect (HPD), and Cable Adapter Detect (CAD) channels. The Auxiliary differential pair supports Dual-Mode DisplayPort operation with the ability to be configured as a bi-directional differential bus while in DisplayPort mode or an I2C™ bus while in TMDS mode. The SN75DP128A is characterized for operation over ambient air temperature of 0°C to 85°C. The SN75DP128A is a one Dual-Mode DisplayPort input to one of two Dual-Mode DisplayPort outputs. The outputs will follow the input signal in a manner that provides the highest level of signal integrity while supporting the EMI benefits of spread spectrum clocking. Through the SN75DP128A data rates of up to 2.7Gbps through each link for a total throughput of up to 10.8Gbps can be realized. The SN75DP128A supports Display Port Spec 1.1a. In addition to the switching of the DisplayPort high speed signal lines, the SN75DP128A also supports the switching of the bi-directional auxiliary (AUX), Hot Plug Detect (HPD), and Cable Adapter Detect (CAD) channels. The Auxiliary differential pair supports Dual-Mode DisplayPort operation with the ability to be configured as a bi-directional differential bus while in DisplayPort mode or an I2C™ bus while in TMDS mode. The SN75DP128A is characterized for operation over ambient air temperature of 0°C to 85°C.