SN74ALS574BOctal D-Type Edge-Triggered Flip-Flops with 3-State Outputs | Logic | 4 | Active | These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input. The SN74ALS575A, SN54AS575, and SN74AS575 may be synchronously cleared by taking the clear () input low.
The output-enable () input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN54ALS574B, SN54AS574, and SN54AS575 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS574B, SN74ALS575A, SN74AS574, and SN74AS575 are characterized for operation from 0°C to 70°C.
These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input. The SN74ALS575A, SN54AS575, and SN74AS575 may be synchronously cleared by taking the clear () input low.
The output-enable () input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN54ALS574B, SN54AS574, and SN54AS575 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS574B, SN74ALS575A, SN74AS574, and SN74AS575 are characterized for operation from 0°C to 70°C. |
SN74ALS576BOctal D-Type Edge-Triggered Flip-Flops With 3-State Outputs | Logic | 4 | Active | These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
These flip-flops enter data on the low-to-high transition of the clock (CLK) input.
The output-enable () input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are disabled.
The SN54ALS576B and SN54AS576 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS576B, SN74ALS577A, and SN74AS576 are characterized for operation from 0°C to 70°C.
These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
These flip-flops enter data on the low-to-high transition of the clock (CLK) input.
The output-enable () input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are disabled.
The SN54ALS576B and SN54AS576 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS576B, SN74ALS577A, and SN74AS576 are characterized for operation from 0°C to 70°C. |
| Logic | 2 | Active | These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C. |
| Buffers, Drivers, Receivers, Transceivers | 5 | Active | These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C. |
| Logic | 5 | Active | These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C. |
| Buffers, Drivers, Receivers, Transceivers | 3 | Active | These octal bus transceivers are designed for asynchronous two-way communication between open-collector and 3-state buses. The devices transmit data from the A bus (open-collector) to the B bus (3 state) or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable () input can be used to disable the device so the buses are isolated.
The -1 version of SN74ALS638A is identical to the standard version, except that the recommended maximum IOLis increased to 48 mA.
The SN74ALS638A, SN74ALS639A, SN74AS638A, and SN74AS639 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between open-collector and 3-state buses. The devices transmit data from the A bus (open-collector) to the B bus (3 state) or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable () input can be used to disable the device so the buses are isolated.
The -1 version of SN74ALS638A is identical to the standard version, except that the recommended maximum IOLis increased to 48 mA.
The SN74ALS638A, SN74ALS639A, SN74AS638A, and SN74AS639 are characterized for operation from 0°C to 70°C. |
| Buffers, Drivers, Receivers, Transceivers | 7 | Active | These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable () input can be used to disable the device so that the buses are effectively isolated.
The -1 version of the SN74ALS640B is identical to the standard version, except that the recommended maximum IOLfor the -1 version is increased to 48 mA. There is no -1 version of the SN54ALS640B.
The SN54ALS640B and SN54AS640 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS640B and SN74AS640 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable () input can be used to disable the device so that the buses are effectively isolated.
The -1 version of the SN74ALS640B is identical to the standard version, except that the recommended maximum IOLfor the -1 version is increased to 48 mA. There is no -1 version of the SN54ALS640B.
The SN54ALS640B and SN54AS640 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS640B and SN74AS640 are characterized for operation from 0°C to 70°C. |
| Logic | 7 | Active | These octal bus transceivers are designed for asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enableinput disables the device so that the buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enableinput disables the device so that the buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C. |
| Integrated Circuits (ICs) | 8 | Active | These octal bus transceivers are designed for asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enableinput disables the device so that the buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enableinput disables the device so that the buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C. |
| Logic | 7 | Active | These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the direction-control (DIR) input. The output-enableinput can be used to disable the device so that the buses are effectively isolated.
The -1 version of the SN74ALS645A is identical to the standard version, except that the recommended maximum IOLis increased to 48 mA. There is no -1 version of the SN54ALS645A.
The SN54ALS645A and SN54AS645 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS645A and SN74AS645 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the direction-control (DIR) input. The output-enableinput can be used to disable the device so that the buses are effectively isolated.
The -1 version of the SN74ALS645A is identical to the standard version, except that the recommended maximum IOLis increased to 48 mA. There is no -1 version of the SN54ALS645A.
The SN54ALS645A and SN54AS645 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS645A and SN74AS645 are characterized for operation from 0°C to 70°C. |
