Texas Instruments

These devices contain an 8-input positive-NAND gate and perform the following Boolean functions in positive logic: Y =A • B •C • D • E • F • G • H or Y =A+B+C+D+E+F+G These devices contain an 8-input positive-NAND gate and perform the following Boolean functions in positive logic: Y =A • B •C • D • E • F • G • H or Y =A+B+C+D+E+F+G

These devices contain four independent 2-input positive-OR gates. They perform the Boolean functionsor Y = A + B in positive logic. The SN54ALS32 and SN54AS32 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS32 and SN74AS32 are characterized for operation from 0°C to 70°C. These devices contain four independent 2-input positive-OR gates. They perform the Boolean functionsor Y = A + B in positive logic. The SN54ALS32 and SN54AS32 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS32 and SN74AS32 are characterized for operation from 0°C to 70°C.

These 8-bit universal shift/storage registers feature multiplexed input/output (I/O) ports to achieve full 8-bit data handling in a 20-pin package. Two function-select (S0, S1) inputs and two output-enable (OE1\, OE2\) inputs can be used to choose the modes of operation listed in the function table. Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs synchronously when the clear (CLR\) input is low. Taking either OE1\ or OE2\ high disables the outputs but has no effect on clearing, shifting, or storing data. The SN54ALS323 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS323 is characterized for operation from 0°C to 70°C. These 8-bit universal shift/storage registers feature multiplexed input/output (I/O) ports to achieve full 8-bit data handling in a 20-pin package. Two function-select (S0, S1) inputs and two output-enable (OE1\, OE2\) inputs can be used to choose the modes of operation listed in the function table. Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs synchronously when the clear (CLR\) input is low. Taking either OE1\ or OE2\ high disables the outputs but has no effect on clearing, shifting, or storing data. The SN54ALS323 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS323 is characterized for operation from 0°C to 70°C.

The SN74ALS35A contains six independent noninverters with open-collector outputs. They perform the Boolean function Y = A. The open-collector outputs require pullup resistors to perform correctly. These outputs may be connected to other open-collector outputs to implement active-low wired-OR or active-high wired-AND functions. Open-collector devices are often used to generate higher VOHlevels. The SN74ALS35A is characterized for operation from 0°C to 70°C. The SN74ALS35A contains six independent noninverters with open-collector outputs. They perform the Boolean function Y = A. The open-collector outputs require pullup resistors to perform correctly. These outputs may be connected to other open-collector outputs to implement active-low wired-OR or active-high wired-AND functions. Open-collector devices are often used to generate higher VOHlevels. The SN74ALS35A is characterized for operation from 0°C to 70°C.

These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off. These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off.

These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE\) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS374A and SN54AS374 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS374A and SN74AS374 are characterized for operation from 0°C to 70°C. These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE\) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS374A and SN54AS374 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS374A and SN74AS374 are characterized for operation from 0°C to 70°C.

These devices contain four independent 2-input positive-NAND buffers. They perform the Boolean functionsor Y = A\ + B\ in positive logic. The SN54ALS37A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS37A is characterized for operation from 0°C to 70°C. These devices contain four independent 2-input positive-NAND buffers. They perform the Boolean functionsor Y = A\ + B\ in positive logic. The SN54ALS37A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS37A is characterized for operation from 0°C to 70°C.

These devices contain four independent 2-input positive-NAND buffers with open-collector outputs. They perform the Boolean functionsor Y = A\ + B\ in positive logic. The open-collector outputs require pullup resistors to perform correctly. These outputs may be connected to other open-collector outputs to implement active-low wired-OR or active-high wired-AND functions. Open-collector devices often are used to generate higher VOHlevels. The SN54ALS38B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS38B is characterized for operation from 0°C to 70°C. These devices contain four independent 2-input positive-NAND buffers with open-collector outputs. They perform the Boolean functionsor Y = A\ + B\ in positive logic. The open-collector outputs require pullup resistors to perform correctly. These outputs may be connected to other open-collector outputs to implement active-low wired-OR or active-high wired-AND functions. Open-collector devices often are used to generate higher VOHlevels. The SN54ALS38B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS38B is characterized for operation from 0°C to 70°C.

These identity comparators perform comparisons on two 8-bit binary or BCD words. The SN74ALS518 provides P = Q outputs, while the ´ALS520 and SN74ALS521 provide P = Q\ outputs. The SN74ALS518 has an open-collector output. The SN74ALS518 and ´ALS520 feature 20-k pullup resistors on the Q inputs for analog or switch data. The SN54ALS520 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS518, SN74ALS520, and SN74ALS521 are characterized for operation from 0°C to 70°C. These identity comparators perform comparisons on two 8-bit binary or BCD words. The SN74ALS518 provides P = Q outputs, while the ´ALS520 and SN74ALS521 provide P = Q\ outputs. The SN74ALS518 has an open-collector output. The SN74ALS518 and ´ALS520 feature 20-k pullup resistors on the Q inputs for analog or switch data. The SN54ALS520 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS518, SN74ALS520, and SN74ALS521 are characterized for operation from 0°C to 70°C.

These identity comparators perform comparisons on two 8-bit binary or BCD words. The SN74ALS518 provides P = Q outputs, while the ´ALS520 and SN74ALS521 provide P = Q\ outputs. The SN74ALS518 has an open-collector output. The SN74ALS518 and ´ALS520 feature 20-k pullup resistors on the Q inputs for analog or switch data. The SN54ALS520 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS518, SN74ALS520, and SN74ALS521 are characterized for operation from 0°C to 70°C. These identity comparators perform comparisons on two 8-bit binary or BCD words. The SN74ALS518 provides P = Q outputs, while the ´ALS520 and SN74ALS521 provide P = Q\ outputs. The SN74ALS518 has an open-collector output. The SN74ALS518 and ´ALS520 feature 20-k pullup resistors on the Q inputs for analog or switch data. The SN54ALS520 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS518, SN74ALS520, and SN74ALS521 are characterized for operation from 0°C to 70°C.