SPV1050Ultra low power energy harvester and battery charger with embedded MPPT and LDOs | Battery Chargers | 1 | Active | The SPV1050 is an ultra-low power and high-efficiency power manager embedding four MOSFETs for boost or buck-boost DC-DC converter and an additional transistor for the load connection/disconnection. An internal high accuracy MPPT algorithm can be used to maximize the power extracted from PV panel or TEG. The internal logic works to guarantee tight monitoring of both the end-of-charge voltage (VEOC) and the minimum battery voltage (VUVP) by opening the pass-transistor at triggering of the VEOC threshold or at triggering of the VUVP threshold to preserve the battery life. Both the VEOC and VUVP thresholds can be trimmed by external resistors connected between the STORE rail and the EOC and UVP pins, respectively. In boost configuration (CONF pin connected to the supply source), the IC requires 550 mV and 30 μA to Cold start; while after the first start-up the input voltage can range between 150 mV and VEOC. In buck-boost configuration (CONF pin connected to ground), the IC requires 2.6 V and 5 μA at Cold start; while after the first start-up input voltage can range between 150 mV up to 18 V. The STORE pin is available as unregulated voltage output (e.g. to supply by external LDO a micro-controller), while two fully independent LDOs (1.8 V and 3.3 V) are embedded for powering other companion ICs like MCU, sensors or RF transceivers. Both LDOs can be independently enabled through the related pins. |
| RF Transceiver Modules and Modems | 2 | Obsolete | |
| RF and Wireless | 2 | Obsolete | |
| PMIC | 3 | Active | The Smart ResetTMdevices provide a useful feature which ensures that inadvertent short reset push-button closures do not cause system resets. This is done by implementing an extended Smart Reset input delay time (tSRC), which ensures a safe reset and eliminates the need for a specific dedicated reset button.
This reset configuration provides versatility and allows the application to distinguish between a software generated interrupt and a hard system reset. When the input push-button is connected to the microcontroller interrupt input, and is closed for a short time, the processor can only be interrupted. If the system still does not respond properly, continuing to keep the push-button closed for the extended setup time tSRCcauses a hard reset of the processor through the reset output.
The SR1 has one Smart Reset input (SR) with preset delayed Smart Reset setup time (tSRC). The reset output (RST) is asserted after the Smart Reset input is held active for the selected tSRCdelay time. TheRSToutput remains asserted either until theSRinput goes to inactive logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output reset pulse duration is fixed for tREC(i.e. factory-programmed). The device fully operates over a broad VCCrange from 2.0 V to 5.5 V. |
| Supervisors | 2 | Active | The Smart Reset™ devices provide a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. This is done by implementing extended Smart Reset™ input delay time (tSRC) and combined push-button inputs, which together ensures a safe reset and eliminates the need for a specific dedicated reset button.
This reset configuration provides versatility and allows the application to distinguish between a software generated interrupt and a hard system reset. When the input push-button are connected to microcontroller interrupt inputs, and are closed for a short time, the processor can only be interrupted. If the system still does not respond properly, continuing to keep the push-button closed for the extended setup time tSRCcauses a hard reset of the processor through the reset output.
The SR2 has two combined delayed Smart Reset™ inputs (SR0,SR1) with preset delayed Smart Reset™ setup time (tSRC). The reset output is asserted after both of the Smart Reset™ inputs were held active for the selected tSRCdelay time. Depending on selected option theRSToutput remains asserted either until at least oneSRinput goes to inactive logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output reset pulse duration is fixed for tREC(i.e. factory-programmed). The reset output,RST, is active low or active high, push-pull or open drain with optional pull-up resistor. The device fully operates over a broad VCCrange 1.65 V to 5.5 V. Below 1.575 V typ. the inputs are ignored and outputs are deasserted; the deasserted reset output levels are then valid down to 1.0 V. |
| RF and Wireless | 1 | Obsolete | |
| RFID, RF Access, Monitoring ICs | 1 | Obsolete | |
SRK1001Adaptive synchronous rectification controller for flyback converter | Integrated Circuits (ICs) | 1 | Active | The SRK1001 controller is designed for secondary side synchronous rectification (SR) in flyback converters, suitable for operation in QR and mixed CCM/DCM fixed frequency circuits.
It provides a high-current gate-drive output capable of driving N-channel Power MOSFETs.
The control scheme of this IC is such that the SR MOSFET is switched on as soon as current starts flowing through its body diode, and then switched off as current approaches zero.
The fast turn-on with minimum delay and innovative adaptive turn-off logic allow maximizing the conduction time of the SR MOSFET and eliminating the effect of parasitic inductance in the circuit.
The device enters low consumption mode when it detects primary controller burst-mode operation, or when the DIS pin is pulled up by the user, or when the SR MOSFET conduction falls below the programmed minimum TON. This improves the converter efficiency at light load, where synchronous rectification is no longer beneficial.
After the converter restarts switching or the DIS pin goes low again and the IC detects that the current conduction in the rectifiers has increased 20% above the min TONprogrammed value, the IC exits low consumption mode and resumes switching operation. |
| RFID Transponders, Tags | 1 | Obsolete | |
ST-ONEHPFully integrated controller for USB-PD 3.1 Extended Power Range (EPR) chargers | Integrated Circuits (ICs) | 1 | Active | The ST-ONEHP is part of the ST-ONE® family, the world’s first digital controllers embedding ARM Cortex M0+ core, an offline programmable controller with synchronous rectification, and USB PD PHY in a single package. Such a system is specifically designed to control ZVS non-complementary active clamp flyback converters to create high power density chargers and adapters with EPR compliant USB-PD interface.
The device includes an active clamp flyback controller and its HV startup on the primary side, a microcontroller and all the peripherals required to control the conversion and the USB-PD communication on the secondary side. The two sides are connected through an embedded galvanically isolated dual communication channel. By using a novel non-complementary control technique and specifically designed power modes the device allows to reach both high efficiency and low no load power consumption
The device is delivered with a pre-loaded firmware which handles both the power conversion and the communication protocols for EPR USB-PD including AVS and electronically marked cable management.
A dedicated memory stores a default device configuration during factory process. The user can change or adapt this memory area to fit the final product specifications. |
