ON Semiconductor

The ON Semiconductor serial SRAM family includes several integrated memory devices including this 256 kb serially accessed Static Random Access Memory, internally organized as 32 k words by 8 bits. The devices are designed and fabricated using advanced CMOS technology to provide both high-speed performance and low power. The devices operate with a single chip select (CS) input and use a simple Serial Peripheral Interface (SPI) serial bus. A single data in and data out line is used along with a clock to access data within the devices. The N25S818HA devices include a HOLD pin that allows communication to the device to be paused. While paused, input transitions will be ignored. The devices can operate over a wide temperature range of -40°C to +85°C and can be available in several standard package offerings.

The ON Semiconductor serial SRAM family includes several integrated memory devices including this 256 kb serially accessed Static Random Access Memory, internally organized as 32 k words by 8 bits. The devices are designed and fabricated using advanced CMOS technology to provide both high-speed performance and low power. The devices operate with a single chip select (CS) input and use a simple Serial Peripheral Interface (SPI) serial bus. A single data in and data out line is used along with a clock to access data within the devices. The N25S830HA devices include a HOLD pin that allows communication to the device to be paused. While paused, input transitions will be ignored. The devices can operate over a wide temperature range of -40°C to +85°C and can be available in several standard package offerings.

The N34TS04 is a combination Temperature Sensor (TS) and 4-Kb of Serial Presence Detect (SPD) EEPROM, which implements the JEDEC TSE2004av DDR4 specification. The TS measures temperature at least 10 times every second. Temperature readings can be retrieved by the host via the serial interface, and are compared to high, low and critical trigger limits stored into internal registers. Over or under limit conditions can be signaled on the open-drainEVENTpin.The 4-Kb memory is partitioned into two individually addressable 2-Kb banks (referred to as SPD pages in the TSE2004av specification). Each bank contains two 1-Kb blocks, which can be Write Protected via Reversible Software Write Protect (RSWP) commands. The SPD EEPROM features a 16-byte wide write buffer and supports the Standard (100 kHz), Fast (400 kHz) and Fast Plus (1 MHz) I2C protocols.

N34TS108 is a digital-output temperature sensor with adynamically-programmable limit window, and under- and overtemperature alert functions. These features provide optimizedtemperature control without the need of frequent temperature readingsby the controller or application processor.The N34TS108 features SMBus and two-wire interfacecompatibility, and allows up to four devices on one bus with theSMBus alert function.The N34TS108 is ideal for thermal management optimization ina variety of consumer, computer, and environmental applications. Thedevice is specified over a temperature range of –40°C to +125°C.

The ON Semiconductor serial SRAM family includes several integrated memory devices including this 64 k serially accessed Static Random Access Memory, internally organized as 8 k words by 8 bits. The devices are designed and fabricated using advanced CMOS technology to provide both high-speed performance and low power. The devices operate with a single chip select (CS) input and use a simple Serial Peripheral Interface (SPI) serial bus. A single data in and data out line is used along with a clock to access data within the devices. The N64S818HA devices include a HOLD pin that allows communication to the device to be paused. While paused, input transitions will be ignored. The devices can operate over a wide temperature range of -40°C to +85°C and can be available in several standard package offerings.

The N84C1611 is a complete memory and supervisory solution for microcontroller-based systems. A EEPROM Serial 16-Kb CPU Supervisor with hardware memory write protection, a system power supervisor with brown out protection and a watchdog timer are integrated together in low power CMOS technology. Memory interface is via an I²C bus.The 1.6-second watchdog circuit returns a system to a known good state if a software or hardware glitch halts or 'hangs' the system. The CAT1161 watchdog monitors the SDA line, making an additional PC board trace unnecessary.The power supply monitor and reset circuit protects memory and system controllers during power up/down and against brownout conditions. Five reset threshold voltages support 5.0 V, 3.3 V and 3.0 V systems. If power supply voltages are out of tolerance reset signals become active, preventing the system microcontroller, ASIC or peripherals from operating. Reset signals become inactive typically 200 ms after the supply voltage exceeds the reset threshold level. With both active high and low reset signals, interface to microcontrollers and other ICs is simple. In addition, a reset pin can be used as a debounced input for push-button manual reset capability.The CAT1161 memory features a 16-byte page. In addition, hardware data protection is provided by a write protect pin WP and by a VCCsense circuit that prevents writes to memory whenever VCCfalls below the reset threshold or until VCCreaches the reset threshold during power up.Available packages include an 8-pin DIP and a surface mount, 8-pin SO package.