LAN8840 Series
Gigabit Ethernet Transceiver (PHY) supporting IEEE1588 w/ RGMII
Manufacturer: Microchip Technology
Catalog
Gigabit Ethernet Transceiver (PHY) supporting IEEE1588 w/ RGMII
Key Features
• Single-Chip 10/100/1000 Mbps Ethernet Transceiver Suitable for IEEE 802.3 Applications
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• RGMII with 3.3V/2.5V/1.8V Tolerant I/Os
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• RGMII Timing Supports On-Chip Delay According to RGMII Version 2.0, with Programming Options for External Delay and Making Adjustments and Corrections to TX and RX Timing Paths
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• Auto-Negotiation to Automatically Select the Highest Link-Up Speed (10/100/1000 Mbps) and Duplex (Half/Full)
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• On-Chip Termination Resistors for the Differential Pairs
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• On-Chip LDO Controller to Support Single 3.3V Supply Operation – Requires Only One External FET to Generate 1.1V for the Core
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• Jumbo Frame Support Up to 16 KB
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• 125 MHz Reference Clock Output
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• Energy-Detect Power-Down Mode for Reduced Power Consumption When Cable is Not Attached
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• EtherSynch® IEEE 1588v2/PTP
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• Layer 2, UDP/IPv4 and UDP/IPv6 formats
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• Tagged and non-tagged frame formats
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• One-step and two-step modes of operation
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• Energy Efficient Ethernet (EEE) Support with Low-Power Idle (LPI) Mode and Clock Stoppage for 100BASE-TX/1000BASE-T and Transmit Amplitude Reduction with 10BASE-Te Option
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• Wake-On-LAN (WOL) Support with Robust Custom-Packet Detection
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• Programmable LED Outputs for Link, Activity, and Speed
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• Baseline Wander Correction
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• LinkMD® TDR-based Cable Diagnostic to Identify Faulty Copper Cabling
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• Signal Quality Indication
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• Parametric NAND Tree Support to Detect Faults Between Chip I/Os and Board
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• Loopback Modes for Diagnostics
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• Automatic MDI/MDI-X Crossover to Detect and Correct Pair Swap at All Speeds of Operation
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• Automatic Detection and Correction of Pair Swaps, Pair Skew, and Pair Polarity
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• MDC/MDIO Management Interface for PHY Register Configuration
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• Interrupt Pin Option
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• Power-Down and Power-Saving Modes
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• Operating Voltages
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• Core (VDD, VDDAL, VDDAL\_PLL): 1.1V (External FET or Regulator)
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• VDD I/O (VDDIO): 3.3V, 2.5V, or 1.8V
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• Transceiver (VDDAH): 3.3V or 2.5V
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• Available in commercial (0°C to +70°C) and extended industrial (-40°C to +105°C) temperature ranges
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• 48-pin VQFN (7 mm × 7 mm) Package
Description
AI
The LAN8840 is a low-power, single-port triple-speed (10BASE-T/100BASE-TX/1000BASE-T) Ethernet physical layer transceiver (PHY) that is optimized for precision process timing. The device enables highly accurate synchronization of motors, valves, actuators and sensors over standard CAT-5, CAT-5e and CAT-6, unshielded twisted pair (UTP) cables.
The LAN8840 supports industry-standard RGMII (Reduced Gigabit Media Independent Interface) providing chip-to-chip connection to a host device with an integrated Gigabit Ethernet MAC.
The LAN8840 provides high-accuracy IEEE 1588-2008 (v2) timestamping to support Microchip Time-Sensitive Network (TSN) Ethernet switches, as well as, SoCs and FPGAs supporting the RGMII interface. The LAN8840 also provides Synchronous Ethernet (SyncE), TSN frame preemption support and multiple power saving features.
Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.
