Analog Devices

The ADP5041 combines one high performance buck regulator and two low dropout (LDO) regulators in a small 20-lead LFCSP to meet demanding performance and board space requirements.The high switching frequency of the buck regulator enables use of tiny multilayer external components and minimizes board space.When the MODE pin is set to logic high, the buck regulator operates in forced PWM mode. When the MODE pin is set to logic low, the buck regulator operates in PWM mode when the load is around the nominal value. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency. The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5041 LDOs extend the battery life of portable devices. The ADP5041 LDOs maintain a power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.Each regulator in the ADP5041 is activated by a high level on the respective enable pin. The output voltages of the regulators and the reset threshold are programmed through external resistor dividers to address a variety of applications. The ADP5041 contains supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. They also provide power-on reset signals. An on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period.

The ADP5042 combines one high performance buck regulator and two low dropout regulators (LDO) in a small 20-lead LFCSP to meet demanding performance and board space requirements.The high switching frequency of the buck regulator enables use of tiny multilayer external components and minimizes the board space.The MODE pin selects the buck mode of operation. When set to logic high, the buck regulators operate in forced PWM mode. When the MODE pin is set to logic low, the buck regulators operate in PWM mode when the load is around the nominal value. When the load current falls below a predefined threshold the regulator operates in power save mode (PSM) improving the light-load efficiency.The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5042 LDOs extend the battery life of portable devices. The two LDOs maintain power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.Each regulator is activated by a high level on the respective enable pin. The ADP5042 is available with factory programmable default output voltages and can be set to a wide range of options.The ADP5042 contains supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. They also provide power-on reset signals. An on-chip dual watchdog timer can reset the microprocessor or power cycle the system (Watchdog 2) if it fails to strobe within a preset timeout period.

The ADP5050 combines four high performance buck regulators and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15 V with no preregulators.Channel 1 and Channel 2 integrate high-side power MOSFETs and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration can provide a single output with up to 8 A of current.Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver output current of 1.2 A.The switching frequency of the ADP5050 can be programmed or synchronized to an external clock. The ADP5050 contains a precision enable pin on each channel for easy power-up sequencing or adjustable UVLO threshold.The ADP5050 integrates a general-purpose LDO regulator with low quiescent current and low dropout voltage that provides up to 200 mA of output current.The optional I2C interface provides the user with flexible configuration options, including adjustable and fixed output voltage options, junction temperature overheat warning, low input voltage detection, and dynamic voltage scaling (DVS).APPLICATIONSSmall cell base stationsFPGA and processor applicationsSecurity and surveillanceMedical applications

The ADP5052 combines four high performance buck regulators and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15 V with no preregulators.Channel 1 and Channel 2 integrate high-side power MOSFETs and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration can provide a single output with up to 8 A of current.Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver output current of 1.2 A.The switching frequency of the ADP5052 can be programmed or synchronized to an external clock. The ADP5052 contains a precision enable pin on each channel for easy power-up sequencing or adjustable UVLO threshold.The ADP5052 integrates a general-purpose LDO regulator with low quiescent current and low dropout voltage that provides up to 200 mA of output current.ApplicationsSmall cell base stationsFPGA and processor applicationsSecurity and surveillanceMedical applications

The ADP5053 combines four high performance buck regulators, a supervisory circuit, a watchdog timer, and a manual reset in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15.0 V with no preregulators.Channel 1 and Channel 2 integrate high-side power MOSFET and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration can provide a single output with up to 8 A of current.Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver an output current of 1.2 A.The switching frequency of the ADP5053 can be programmed or synchronized to an external clock. The ADP5053 contains a precision enable pin on each channel for easy power-up sequencing or adjustable UVLO threshold.The ADP5053 contains supervisory circuits that monitor the voltage level. The watchdog timer can generate a reset if the WDI pin is not toggled within a preset timeout period. Processor reset mode or system power on/off switch mode can be selected for manual reset functionality.ApplicationsSmall cell base stationsFPGA and processor applicationsSecurity and surveillanceMedical applications

The ADP5056 combines three high performance buck regulators in a 43-terminal land grid array (LGA) package that meets the demanding performance and board space requirements. The device enables direct connection to high input voltages up to 18 V with no preregulators.All channels integrate both high-side and low-side power metaloxide semiconductor field effect transistors (MOSFETs) to achieve an efficiency optimized solution. Channel 1 and Channel 2 deliver a programmable output current of 3.5 A or 7 A, or provide a single output with up to 14 A of current in parallel operation. Channel 3 delivers a programmable output current of 1.5 A or 3 A.The switching frequency of the ADP5056 can be programmed or synchronized to an external clock. The ADP5056 contains an enable pin (ENx) on each channel for easy power-up sequencing or adjustable undervoltage lockout (UVLO) threshold.The ADP5056 integrates start-up/shutdown sequence control, forced pulse-width modulation/power saving mode (FPWM/PSM) selection, an output discharge switch, and a power-good signal.The ADP5056 is rated at −40°C to +150°C junction temperature.Note that throughout this data sheet, multifunction pins, such as SYNC/MODE, are referred to either by the entire pin name or by a single function of the pin, for example, SYNC, when only that function is relevant.Small cell base stationsField programmable gate array (FPGA) and processor applicationsSecurity and surveillanceMedical applications

The ADP5061 charger is fully compliant with USB 3.0 and the USB Battery Charging Specification 1.2 and enables charging via the mini USB VBUS pin from a wall charger, car charger, or USB host port.The ADP5061 operates from a 4 V to 6.7 V input voltage range but is tolerant of voltages up to 20 V. The 20 V voltage tolerance alleviates the concerns about the USB bus spiking during disconnect or connect scenarios.The ADP5061 features an internal FET between the linear charger output and the battery. This permits battery isolation and, hence, system powering under a dead battery or no battery scenario, which allows for immediate system function on connection to a USB power supply.Based on the type of USB source, which is detected by an external USB detection chip, the ADP5061 can be set to apply the correct current limit for optimal charging and USB compliance.The ADP5061 has three factory programmable digital input/output pins that provide maximum flexibility for different systems. These digital input/output pins permit combinations of features such as, input current limits, charging enable and disable, charging current limits, and a dedicated interrupt output pin.APPLICATIONSDigital still camerasDigital video camerasSingle cell Li-Ion portable equipmentPDAs, audio, GPS devicesPortable medical devicesMobile phones

The ADP5063 charger is fully compliant with USB 3.0 and the USB Battery Charging 1.2 Compliance Plan Specification, and enables charging via the mini USB VBUS pin from a wall charger, car charger, or USB host port.The ADP5063 operates from a 4 V to 6.7 V input voltage range but is tolerant of voltages up to 20 V, thereby alleviating concerns about USB bus spikes during disconnection or connection scenarios.The ADP5063 features an internal field effect transistor (FET) between the linear charger output and the battery. This permits battery isolation and, therefore, system powering under a dead battery or no battery scenario, which allows immediate system function upon connection to a USB power supply.Based on the type of USB source, which is detected by an external USB detection chip, the ADP5063 can be set to apply the correct current limit for optimal charging and USB compliance.The ADP5063 has three factory-programmable digital input/out-put pins that provide maximum flexibility for different systems. These digital input/output pins permit a combination of features, such as input current limits, charging enable and disable, charging current limits, and a dedicated interrupt output pin.APPLICATIONSSingle cell LiFePO4portable equipmentPortable medical devicesPortable instrumentation devicesPortable consumer devices

The ADP5065 charger is fully compliant with the USB 2.0, USB 3.0, and USB Battery Charging Specification 1.1 and enables charging via the mini USB VBUS pin from a wall charger, car charger, or USB host port.The ADP5065 operates from a 4 V to 5.5 V input voltage range but is tolerant of voltages of up to 20 V. This alleviates the concerns about the USB bus spiking during disconnect or connect scenarios.The ADP5065 also features an internal FET between the dc-to-dc charger output and the battery. This permits battery isolation and, hence, system powering under a dead battery or no battery scenario, which allows for immediate system function on connection to a USB power supply.Based on the type of USB source, which is detected by an external USB detection chip, the ADP5065 can be set to apply the correct current limit for optimal charging and USB compliance.The ADP5065 comes in a very small and low profile 20-lead WLCSP (0.5 mm pitch spacing) package.The overall solution requires only five small, low profile external components consisting of four ceramic capacitors (one of which is the battery filter capacitor), one multilayer inductor. In addition to these components, there is one optional dead battery situation default setting resistor. This configuration enables a very small PCB area to provide an integrated and performance enhancing solution to USB battery charging and power rail provision.APPLICATIONSDigital still camerasDigital video camerasSingle cell Li-Ion portable equipmentPDA, audio, GPS devicesMobile phones