Analog Devices Inc./Maxim Integrated

The AD4695/AD4696are compact, high accuracy, low power, 16-channel, 16-bit, 500 kSPS/1 MSPS, multiplexed input precision, successive approximation register (SAR) analog-to-digital converters (ADCs) with Easy Drive features and extensive digital functionality.The AD4695/AD4696 are optimal for use in space constrained, multichannel, precision data acquisition systems and monitoring circuits. The AD4695/AD4696 feature a true 16-bit SAR ADC core with no missing codes, a 16-channel, low crosstalk multiplexer, a flexible channel sequencer, overvoltage protection clamp circuits on each analog input, on-chip oversampling and decimation, threshold detection and alert indicators, and an autonomous conversion (autocycle) mode.The AD4695/AD4696 Easy Drive features relax the drive requirements of the analog front end (AFE) and reference circuitry. Analog input high-Z mode and reference input high‑Z mode simplify system designs, reduce component count, and increase channel density by removing the need for dedicated high speed ADC drivers and reference buffers. The WLCSP option of the AD4695/AD4696 includes an internal reference buffer, which provides a true, buffered reference input.Input overvoltage protection clamps on each analog input protect the AD4695/AD4696 from overvoltage events and prevent overvoltage events on one channel from degrading performance on other channels (see Figure 27 in the data sheet).Advanced digital functionality makes the AD4695/AD4696 compatible with a variety of low power digital hosts. The low serial peripheral interface (SPI) clock rate requirements, on-chip customizable channel sequencers, and oversampling and decimation reduce the burden on the digital host system. Autocycle mode and threshold detection features enable low power, interrupt driven firmware design by performing conversions autonomously and generating alerts based on channel specific threshold limits.The AD4695/AD4696 are available in a 5 mm × 5 mm 32-lead lead frame chip scale package (LFCSP) and a 2.96 mm × 2.96 mm 36-ball wafer level chip scale package (WLCSP) with operation specified from −40°C to +125°C.APPLICATIONSPhotodiode monitoringMedical instrumentationVital signs monitoringElectronic test and measurementAutomated test equipmentInstrumentation and process controlBattery-powered equipment

The AD4697/AD4698are compact, high accuracy, low power, 8-channel, 16-bit, 500 kSPS/1 MSPS, multiplexed input precision, successive approximation register (SAR) analog-to-digital converters (ADCs) with Easy Drive features and extensive digital functionality.The AD4697/AD4698 are optimal for use in space constrained, multichannel, precision data acquisition systems and monitoring circuits. The AD4697/AD4698 feature a true 16-bit SAR ADC core with no missing codes, an 8-channel, low crosstalk multiplexer, a flexible channel sequencer, overvoltage protection clamp circuits on each analog input, on-chip oversampling and decimation, threshold detection and alert indicators, and an autonomous conversion (autocycle) mode.The AD4697/AD4698 Easy Drive features relax the drive requirements of the analog front end (AFE) and reference circuitry. Analog input high-Z mode and reference input high‑Z mode simplify system designs, reduce component count, and increase channel density by removing the need for dedicated high speed ADC drivers and reference buffers. The WLCSP option of the AD4697/AD4698 includes an internal reference buffer, which provides a true, buffered reference input.Input overvoltage protection clamps on each analog input protect the AD4697/AD4698 from overvoltage events and prevent overvoltage events on one channel from degrading performance on other channels (see Figure 27 in the data sheet).Advanced digital functionality makes the AD4697/AD4698 compatible with a variety of low power digital hosts. The low serial peripheral interface (SPI) clock rate requirements, on-chip customizable channel sequencers, and oversampling and decimation reduce the burden on the digital host system. Autocycle mode and threshold detection features enable low power, interrupt driven firmware design by performing conversions autonomously and generating alerts based on channel specific threshold limits.The AD4697/AD4698 are available in a 4.00 mm × 4.00 mm, 24-lead lead frame chip scale package (LFCSP) and a 2.960 mm × 2.960 mm, 36-lead wafer level chip scale package (WLCSP). All packages are specified with operation from −40°C to +125°C.APPLICATIONSPhotodiode monitoringMedical instrumentationVital signs monitoringElectronic test and measurementAutomated test equipmentInstrumentation and process controlBattery-powered equipment

TheAD4697/AD4698 are compact, high accuracy, low power, 8-channel, 16-bit, 500 kSPS/1 MSPS, multiplexed input precision, successive approximation register (SAR) analog-to-digital converters (ADCs) with Easy Drive features and extensive digital functionality.The AD4697/AD4698 are optimal for use in space constrained, multichannel, precision data acquisition systems and monitoring circuits. The AD4697/AD4698 feature a true 16-bit SAR ADC core with no missing codes, an 8-channel, low crosstalk multiplexer, a flexible channel sequencer, overvoltage protection clamp circuits on each analog input, on-chip oversampling and decimation, threshold detection and alert indicators, and an autonomous conversion (autocycle) mode.The AD4697/AD4698 Easy Drive features relax the drive requirements of the analog front end (AFE) and reference circuitry. Analog input high-Z mode and reference input high‑Z mode simplify system designs, reduce component count, and increase channel density by removing the need for dedicated high speed ADC drivers and reference buffers. The WLCSP option of the AD4697/AD4698 includes an internal reference buffer, which provides a true, buffered reference input.Input overvoltage protection clamps on each analog input protect the AD4697/AD4698 from overvoltage events and prevent overvoltage events on one channel from degrading performance on other channels (see Figure 27 in the data sheet).Advanced digital functionality makes the AD4697/AD4698 compatible with a variety of low power digital hosts. The low serial peripheral interface (SPI) clock rate requirements, on-chip customizable channel sequencers, and oversampling and decimation reduce the burden on the digital host system. Autocycle mode and threshold detection features enable low power, interrupt driven firmware design by performing conversions autonomously and generating alerts based on channel specific threshold limits.The AD4697/AD4698 are available in a 4.00 mm × 4.00 mm, 24-lead lead frame chip scale package (LFCSP) and a 2.960 mm × 2.960 mm, 36-lead wafer level chip scale package (WLCSP). All packages are specified with operation from −40°C to +125°C.APPLICATIONSPhotodiode monitoringMedical instrumentationVital signs monitoringElectronic test and measurementAutomated test equipmentInstrumentation and process controlBattery-powered equipment

The AD4855 is a fully buffered, 8-channel simultaneous sampling, 16-bit, 250 kSPS data acquisition system (DAS) with differential, wide common-mode range inputs. Its functional architecture is shown in Figure 1. Operating from a 5 V low voltage supply, flexible input buffer supplies, and using the precision low drift internal reference and reference buffer, the AD4855 allows the SoftSpan range of each channel to be independently configured to match the native application signal swing, minimizing additional external signal conditioning. To further maximize single-conversion dynamic range, the AD4855 incorporates seamless high dynamic range (SHDR) technology. When enabled, the input signal path gain of the channel is automatically optimized on a sample-by-sample basis, minimizing converter noise on each sample without impacting linearity.The 11 MHz bandwidth, picoamp input analog buffers, wide input common-mode range, and 120 dB common-mode rejection ratio (CMRR) of the AD4855 allow the DAS to directly digitize input signals with arbitrary swings on INx+ and INx−. Its input signal flexibility, combined with ±160 μV integral nonlinearity (INL), no missing codes at 16 bits, 94.6 dB signal to noise ratio (SNR), and 98.1 dB dynamic range, make the AD4855 an ideal choice for applications requiring high accuracy, throughput, and precision in a compact solution footprint. Enabling 16-bit oversampling offers further SNR and dynamic range improvements. Optional per channel offset, gain, and phase adjustment provide the ability to calibrate and remove system-level errors upstream to the DAS.The AD4855 features a serial peripheral interface (SPI) register configuration bus (0.9 V to 5.25 V) and supports both low voltage differential signaling buses (LVDS) and complementary metal-oxide semiconductor (CMOS) conversion data output buses, selectable using the LVDS/CMOSpin. Between one and eight lines of data output can be employed in CMOS mode, allowing the user to optimize bus width and throughput.The 7.00 mm × 7.00 mm, 64-ball, ball grid array (BGA) of the AD4855 includes all critical power supply and reference bypass capacitors, minimizing full solution footprint and component count and reducing sensitivity to application printed circuit board (PCB) layout. The device operates over an extended industrial temperature range of −40°C to +125°C.Note that throughout this data sheet, multifunction pins such as LVDS/CMOSare referred to either by the entire pin name or by a single function of the pin. For example, LVDS when only that function is relevant.ApplicationsAutomatic test equipmentAvionics and aerospaceInstrumentation and control systemsSemiconductor manufacturingTest and measurement

The AD4856 is a fully buffered, 8-channel simultaneous sampling, 20-bit, 250 kSPS data acquisition system (DAS) with differential, wide common-mode range inputs. Its functional architecture is shown in Figure 1. Operating from a 5 V low voltage supply, flexible input buffer supplies, and using the precision low drift internal reference and reference buffer, the AD4856 allows the SoftSpan range of each channel to be independently configured to match the native application signal swing, minimizing additional external signal conditioning. To further maximize single-conversion dynamic range, the AD4856 incorporates seamless high dynamic range (SHDR) technology. When enabled, the input signal path gain of the channel is automatically optimized on a sample-by-sample basis, minimizing converter noise on each sample without impacting linearity.The 11 MHz bandwidth, picoamp input analog buffers, wide input common-mode range, and 120 dB common-mode rejection ratio (CMRR) of the AD4856 allow the DAS to directly digitize input signals with arbitrary swings on INx+ and INx−. Its input signal flexibility, combined with ±160 μV integral nonlinearity (INL), no missing codes at 20 bits, 97.2 dB signal to noise ratio (SNR), and 111.4 dB dynamic range, make the AD4856 an ideal choice for applications requiring high accuracy, throughput, and precision in a compact solution footprint. Enabling 24-bit oversampling offers further SNR and dynamic range improvements. Optional per channel offset, gain, and phase adjustment provide the ability to calibrate and remove system-level errors upstream to the DAS.The AD4856 features a serial peripheral interface (SPI) register configuration bus (0.9 V to 5.25 V) and supports both low voltage differential signaling buses (LVDS) and complementary metal-oxide semiconductor (CMOS) conversion data output buses, selectable using the LVDS/CMOSpin. Between one and eight lines of data output can be employed in CMOS mode, allowing the user to optimize bus width and throughput.The 7.00 mm × 7.00 mm, 64-ball, ball grid array (BGA) of the AD4856 includes all critical power supply and reference bypass capacitors, minimizing full solution footprint and component count and reducing sensitivity to application printed circuit board (PCB) layout. The device operates over an extended industrial temperature range of −40°C to +125°C.Note that throughout this data sheet, multifunction pins such as LVDS/CMOSare referred to either by the entire pin name or by a single function of the pin. For example, LVDS when only that function is relevant.APPLICATIONSAutomatic test equipmentAvionics and aerospaceInstrumentation and control systemsSemiconductor manufacturingTest and measurement

The AD4857 is a fully buffered, 8-channel simultaneous sampling, 16-bit, 1 MSPS data acquisition system (DAS) with differential, wide common-mode range inputs. Its functional architecture is shown in Figure 1. Operating from a 5 V low voltage supply, flexible input buffer supplies, and using the precision low drift internal reference and reference buffer, the AD4857 allows the SoftSpan range of each channel to be independently configured to match the native application signal swing, minimizing additional external signal conditioning. To further maximize single-conversion dynamic range, the AD4857 incorporates seamless high dynamic range (SHDR) technology. When enabled, the input signal path gain of the channel is automatically optimized on a sample-by-sample basis, minimizing converter noise on each sample without impacting linearity.The 11 MHz bandwidth, picoamp input analog buffers, wide input common-mode range, and 120 dB common-mode rejection ratio (CMRR) of the AD4857 allow the DAS to directly digitize input signals with arbitrary swings on INx+ and INx−. Its input signal flexibility, combined with ±160 μV integral nonlinearity (INL), no missing codes at 16 bits, 94.6 dB signal to noise ratio (SNR), and 98.1 dB dynamic range, make the AD4857 an ideal choice for applications requiring high accuracy, throughput, and precision in a compact solution footprint. Enabling 16-bit oversampling offers further SNR and dynamic range improvements. Optional per channel offset, gain, and phase adjustment provide the ability to calibrate and remove system-level errors upstream to the DAS.The AD4857 features a serial peripheral interface (SPI) register configuration bus (0.9 V to 5.25 V) and supports both low voltage differential signaling buses (LVDS) and complementary metal-oxide semiconductor (CMOS) conversion data output buses, selectable using the LVDS/CMOS pin. Between one and eight lines of data output can be employed in CMOS mode, allowing the user to optimize bus width and throughput.The 7.00 mm × 7.00 mm, 64-ball, ball grid array (BGA) of the AD4857 includes all critical power supply and reference bypass capacitors, minimizing full solution footprint and component count and reducing sensitivity to application printed circuit board (PCB) layout. The device operates over an extended industrial temperature range of −40°C to +125°C.Note that throughout this data sheet, multifunction pins such as LVDS/CMOS are referred to either by the entire pin name or by a single function of the pin. For example, LVDS when only that function is relevant.Automatic test equipmentAvionics and aerospaceInstrumentation and control systemsSemiconductor manufacturingTest and measurement

The AD4858 is a fully buffered, 8-channel simultaneous sampling, 20-bit, 1 MSPS data acquisition system (DAS) with differential, wide common-mode range inputs. Its functional architecture is shown in Figure 1 in the data sheet. Operating from a 5 V low voltage supply, flexible input buffer supplies, and using the precision low drift internal reference and reference buffer, the AD4858 allows the SoftSpan range of each channel to be independently configured to match the native application signal swing, minimizing additional external signal conditioning. To further maximize single-conversion dynamic range, the AD4858 incorporates seamless high dynamic range (SHDR) technology. When enabled, the input signal path gain of the channel is automatically optimized on a sample-by-sample basis, minimizing converter noise on each sample without impacting linearity.The 11 MHz bandwidth, picoamp input analog buffers, wide input common-mode range, and 120 dB common-mode rejection ratio (CMRR) of the AD4858 allow the DAS to directly digitize input signals with arbitrary swings on INx+ and INx−. Its input signal flexibility, combined with ±160 μV integral nonlinearity (INL), no missing codes at 20 bits, 97.2 dB signal to noise ratio (SNR), and 111.4 dB dynamic range (DR), make the AD4858 an ideal choice for applications requiring high accuracy, throughput, and precision in a compact solution footprint. Enabling 24-bit oversampling offers further SNR and dynamic range improvements. Optional per channel offset, gain, and phase adjustment provide the ability to calibrate and remove system-level errors upstream to the DAS.The AD4858 features a serial peripheral interface (SPI) register configuration bus (0.9 V to 5.25 V), and supports both low voltage differential signaling buses (LVDS) and complementary metal-oxidize semiconductor (CMOS) conversion data output buses, selectable using the LVDS/CMOSpin. Between one and eight lines of data output can be employed in CMOS mode, allowing the user to optimize bus width and throughput.The 7.00 mm × 7.00 mm, 64-ball, ball grid array (BGA) of the AD4858 includes all critical power supply and reference bypass capacitors, minimizing full solution footprint and component count, and reducing sensitivity to application printed circuit board (PCB) layout. It operates over an extended industrial temperature range of −40°C to +125°C.APPLICATIONSAutomatic test equipmentAvionics and aerospaceInstrumentation and control systemsSemiconductor manufacturingTest and measurement

The AD5024/AD5044/AD5064are low power, quad 12-/14-/ 16-bit buffered voltage outputnanoDAC®DACs that offer relative accuracy specifications of 1 LSB INL and 1 LSB DNL with individual reference pins and can operate from a single 4.5 V to 5.5 V supply. The AD5024 / AD5044 / AD5064 parts also offer a differential accuracy specification of ±1 LSB. The parts use a versatile 3-wire, low power Schmitt trigger serial interface that operates at clock rates up to 50 MHz and is compatible with standard SPI, QSPI™, MICROWIRE™, and DSP interface standards. Integrated reference buffers and output amplifiers are also provided on-chip. The AD5024/AD5044/AD5064/AD5064-1 incorporate a power-on reset circuit that ensures the DAC output powers up to zero scale or midscale and remains there until a valid write takes place to the device. The AD5024 / AD5044 / AD5064 / AD5064-1 contain a power-down feature that reduces the current consumption of the device to typically 400 nA at 5 V and provides software selectable output loads while in power- down mode. Total unadjusted error for the parts is <2 mV.Product HighlightsQuad channel available in 16-lead TSSOP package.16-bit accurate, 1 LSB INL.Low glitch on power-up.High speed serial interface with clock speeds up to 50 MHz.Reset to known output voltage (zero scale or midscale).ApplicationsProcess controlData acquisition systemsPortable battery-powered instrumentsDigital gain and offset adjustmentProgrammable voltage and current sourcesProgrammable attenuators