Analog Devices Inc./Maxim Integrated

The AD4630-16/AD4632-16are 2-channel, simultaneous sampling, Easy Drive™, 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADCs). With a guaranteed maximum ±3 ppm integral nonlinearity (INL) and no missing codes at 16-bits, the AD4630-16/AD4632-16 achieve excellent precision from −40°C to +125°C. Figure 1 in the data sheet shows the functional architecture of the AD4630-16/AD4632-16.A low-drift, internal precision-reference buffer eases voltage-reference sharing with other system circuitry. The AD4630-16/AD4632-16 offer a typical dynamic range of 97.4 dB when using a 5 V reference. The low noise floor enables signal chains utilizing less gain and lower power. A block averaging filter with programmable decimation ratio is available and can reduce noise for low-bandwidth signals, improving accuracy. The wide differential input and common-mode ranges allow inputs to use the full voltage reference (±VREF) range without saturating, simplifying signal-conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front end (AFE) components compatible with the AD4630-16/AD4632-16. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial-peripheral interface (SPI) eases host processor and ADC integration. A wide data-clocking window, multiple serial-data output (SDO) lanes, and optional dual data rate (DDR) data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode can relax the timing requirements and simplify the use of digital isolators.The ball grid array (BGA) package of the AD4630-16/AD4632-16 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system-component count, and lessening sensitivity to board layout.APPLICATIONSAutomatic test equipmentDigital control loopsMedical instrumentationSeismologySemiconductor manufacturingScientific instrumentation

The AD4630-24/AD4632-24are two-channel, simultaneous sampling, Easy Drive™, 2 MSPS or 500 kSPS successive approximation register (SAR) analog-to-digital converters (ADCs). With a guaranteed maximum ±0.9 ppm INL and no missing codes at 24 bits, the AD4630-24/AD4632-24 achieve unparalleled precision from −40°C to +125°C. Figure 1 in the data sheet shows the functional architecture of the AD4630-24/AD4632-24.A low drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. The AD4630-24/ AD4632-24 offer a typical dynamic range of 106 dB when using a 5 V reference. The low noise floor enables signal chains requiring less gain and lower power. A block averaging filter with programmable decimation ratio can increase dynamic range up to 153 dB. The wide differential input and common-mode ranges allow inputs to use the full voltage reference (±VREF) range without saturating, simplifying signal conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front-end components compatible with the AD4630-24/AD4632-24. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial peripheral interface (SPI) eases host processor and ADC integration. A wide data clocking window, multiple SDO lanes, and optional dual data rate (DDR) data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS or 500 kSPS. Echo clock mode and ADC host clock mode relax the timing requirements and simplify the use of digital isolators.The 64-ball chip scale package ball grid array (CSP_BGA) of the AD4630-24/AD4632-24 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system component count, and lessening sensitivity to board layout.APPLICATIONSAutomatic test equipmentDigital control loopsMedical instrumentationSeismologySemiconductor manufacturingScientific instrumentation

TheAD4630-16/AD4632-16 are 2-channel, simultaneous sampling, Easy Drive™, 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADCs). With a guaranteed maximum ±3 ppm integral nonlinearity (INL) and no missing codes at 16-bits, the AD4630-16/AD4632-16 achieve excellent precision from −40°C to +125°C. Figure 1 in the data sheet shows the functional architecture of the AD4630-16/AD4632-16.A low-drift, internal precision-reference buffer eases voltage-reference sharing with other system circuitry. The AD4630-16/AD4632-16 offer a typical dynamic range of 97.4 dB when using a 5 V reference. The low noise floor enables signal chains utilizing less gain and lower power. A block averaging filter with programmable decimation ratio is available and can reduce noise for low-bandwidth signals, improving accuracy. The wide differential input and common-mode ranges allow inputs to use the full voltage reference (±VREF) range without saturating, simplifying signal-conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front end (AFE) components compatible with the AD4630-16/AD4632-16. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial-peripheral interface (SPI) eases host processor and ADC integration. A wide data-clocking window, multiple serial-data output (SDO) lanes, and optional dual data rate (DDR) data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode can relax the timing requirements and simplify the use of digital isolators.The ball grid array (BGA) package of the AD4630-16/AD4632-16 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system-component count, and lessening sensitivity to board layout.APPLICATIONSAutomatic test equipmentDigital control loopsMedical instrumentationSeismologySemiconductor manufacturingScientific instrumentation

TheAD4630-24/AD4632-24 are two-channel, simultaneous sampling, Easy Drive™, 2 MSPS or 500 kSPS successive approximation register (SAR) analog-to-digital converters (ADCs). With a guaranteed maximum ±0.9 ppm INL and no missing codes at 24 bits, the AD4630-24/AD4632-24 achieve unparalleled precision from −40°C to +125°C. Figure 1 in the data sheet shows the functional architecture of the AD4630-24/AD4632-24.A low drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. The AD4630-24/ AD4632-24 offer a typical dynamic range of 106 dB when using a 5 V reference. The low noise floor enables signal chains requiring less gain and lower power. A block averaging filter with programmable decimation ratio can increase dynamic range up to 153 dB. The wide differential input and common-mode ranges allow inputs to use the full voltage reference (±VREF) range without saturating, simplifying signal conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front-end components compatible with the AD4630-24/AD4632-24. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial peripheral interface (SPI) eases host processor and ADC integration. A wide data clocking window, multiple SDO lanes, and optional dual data rate (DDR) data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS or 500 kSPS. Echo clock mode and ADC host clock mode relax the timing requirements and simplify the use of digital isolators.The 64-ball chip scale package ball grid array (CSP_BGA) of the AD4630-24/AD4632-24 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system component count, and lessening sensitivity to board layout.APPLICATIONSAutomatic test equipmentDigital control loopsMedical instrumentationSeismologySemiconductor manufacturingScientific instrumentation

The AD4682 and the AD4683 are a 16-bit, pin-compatible family of dual, simultaneous sampling, high speed, low power, successive approximation register (SAR), analog-to-digital converters (ADCs) that operate from a 3.0 V to 3.6 V power supply and feature throughput rates up to 1 MSPS for the AD4682 and 500 kSPS for the AD4683. The analog input type is pseudo differential and is sampled and converted on the falling edge ofCS.Integrated on-chip oversampling blocks improve dynamic range and reduce noise at lower bandwidths. A buffered internal 2.5 V reference is included. Alternatively, an external reference up to 3.3 V can be used.The conversion process and data acquisition use standard control inputs that allow simple interfacing to microprocessors or digital signal processors (DSPs). The devices are compatible with 1.8 V, 2.5 V, and 3.3 V interfaces, using a separate logic supply.ApplicationsMotor control position feedbackMotor control current senseSonarPower qualityData acquisition systemsErbium doped fiber amplifier (EDFA) applicationsInphase (I) and quadrature (Q) demodulation

The AD4684/AD4685are 16-bit, dual, simultaneous sampling, high speed, successive approximation register (SAR), analog-to-digital converters (ADCs) that operate from a 3.0 V to 3.6 V power supply and feature throughput rates of up to 1 MSPS for the AD4684 and 500 kSPS for the AD4685. The analog input types are single-ended and are sampled and converted on the falling edge ofCS.The AD4684/AD4685 have an on-chip sequencer and integrated on-chip oversampling block to improve dynamic range and reduce noise at lower bandwidths. A buffered internal 2.5 V reference is included. Alternatively, an external reference up to 3.3 V can be used. The conversion process and data acquisition use standard control inputs, allowing interfacing to microprocessors or digital signal processors (DSPs). The AD4684/AD4685 is compatible with 1.8 V, 2.5 V, and 3.3 V interfaces by using the separate logic supply. The AD4684/AD4685 are available in a 16-lead, 3 mm × 3 mm lead frame chip scale package (LFCSP) with operation specified from −40°C to +125°C.PRODUCT HIGHLIGHTS4-channel, dual simultaneous sampling ADC.Pin-compatible product family.High throughput rate: 1 MSPS (AD4684) and 500 kSPS (AD4685).Space-saving, 16-lead, 3 mm × 3 mm LFCSP.Integrated oversampling block to increase dynamic range and SNR and to reduce SCLK speed requirements.Single-ended analog inputs.Small sampling capacitor reduces amplifier drive burden.APPLICATIONSMotor control position feedbackMotor control current senseSonarsPower qualityData acquisition systemsErbium doped fiber amplifier (EDFA) applicationsInphase and quadrature demodulation

TheAD4684/AD4685 are 16-bit, dual, simultaneous sampling, high speed, successive approximation register (SAR), analog-to-digital converters (ADCs) that operate from a 3.0 V to 3.6 V power supply and feature throughput rates of up to 1 MSPS for the AD4684 and 500 kSPS for the AD4685. The analog input types are single-ended and are sampled and converted on the falling edge ofCS.The AD4684/AD4685 have an on-chip sequencer and integrated on-chip oversampling block to improve dynamic range and reduce noise at lower bandwidths. A buffered internal 2.5 V reference is included. Alternatively, an external reference up to 3.3 V can be used. The conversion process and data acquisition use standard control inputs, allowing interfacing to microprocessors or digital signal processors (DSPs). The AD4684/AD4685 is compatible with 1.8 V, 2.5 V, and 3.3 V interfaces by using the separate logic supply. The AD4684/AD4685 are available in a 16-lead, 3 mm × 3 mm lead frame chip scale package (LFCSP) with operation specified from −40°C to +125°C.PRODUCT HIGHLIGHTS4-channel, dual simultaneous sampling ADC.Pin-compatible product family.High throughput rate: 1 MSPS (AD4684) and 500 kSPS (AD4685).Space-saving, 16-lead, 3 mm × 3 mm LFCSP.Integrated oversampling block to increase dynamic range and SNR and to reduce SCLK speed requirements.Single-ended analog inputs.Small sampling capacitor reduces amplifier drive burden.APPLICATIONSMotor control position feedbackMotor control current senseSonarsPower qualityData acquisition systemsErbium doped fiber amplifier (EDFA) applicationsInphase and quadrature demodulation