Analog Devices Inc./Maxim Integrated

The MAX5888 is an advanced, 16-bit, 500Msps digital-to-analog converter (DAC) designed to meet the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications. Operating from a single 3.3V supply, this DAC offers exceptional dyna-mic performance such as 76dBc spurious-free dynamic range (SFDR) at fOUT= 40MHz. The DAC supports update rates of 500Msps and a power dissipation of only 250mW.The MAX5888 utilizes a current-steering architecture, which supports a full-scale output current range of 2mA to 20mA, and allows a differential output voltage swing between 0.1VP-Pand 1VP-P.The MAX5888 features an integrated 1.2V bandgap reference and control amplifier to ensure high accuracy and low noise performance. Additionally, a separate reference input pin enables the user to apply an external reference source for optimum flexibility and to improve gain accuracy.The digital and clock inputs of the MAX5888 are designed for differential low-voltage differential signal (LVDS)-compatible voltage levels. The MAX5888 is available in a 68-lead QFN package with an exposed paddle (EP) and is specified for the extended industrial temperature range (-40°C to +85°C).See a parametric table of the complete family of pin-compatible 12-/14-/16-bit high-speed DACs.ApplicationsAutomated Test Equipment (ATE)Base Stations: Single-/Multicarrier UMTS, CDMA, GSMCommunications: LMDS, MMDS, Point-to-Point MicrowaveDigital Signal SynthesisInstrumentation

The MAX5889 advanced 12-bit, 600Msps, digital-to-analog converter (DAC) meets the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications. Operating from 3.3V and 1.8V supplies, the MAX5889 DAC supports update rates of 600Msps using high-speed LVDS inputs while consuming only 292mW of power and offers exceptional dynamic performance such as 79dBc spurious-free dynamic range (SFDR) at fOUT= 30MHz.The MAX5889 utilizes a current-steering architecture that supports a 2mA to 20mA full-scale output current range, and produces -2dBm to -22dBm full-scale output signal levels with a double-terminated 50Ω load. The MAX5889 features an integrated 1.2V bandgap reference and control amplifier to ensure high-accuracy and low-noise performance. A separate reference input (REFIO) allows for the use of an external reference source for optimum flexibility and improved gain accuracy.The MAX5889 digital inputs accept LVDS voltage levels, and the flexible clock input can be driven differentially or single-ended, AC- or DC-coupled. The MAX5889 is available in a 68-pin QFN package with an exposed paddle (EP) and is specified for the extended (-40°C to +85°C) temperature range.Refer to the MAX5891 and MAX5890 data sheets for pin-compatible 16-bit and 14-bit versions of the MAX5889.See a parametric table of the complete family of pin-compatible, 12-/14-/16-bit high-speed DACs.ApplicationsAutomated Test Equipment (ATE)Base Stations: Single-Carrier UMTS, CDMA, GSMCable Modem Termination Systems (CMTS)Communications: Fixed Broadband Wireless Access, Point-to-Point MicrowaveDirect Digital Synthesis (DDS)Instrumentation

The MAX5891 advanced 16-bit, 600Msps, digital-to-analog converter (DAC) meets the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications. Operating from 3.3V and 1.8V supplies, the MAX5891 DAC supports update rates of 600Msps using high-speed LVDS inputs while consuming only 298mW of power and offers exceptional dynamic performance such as 80dBc spurious-free dynamic range (SFDR) at fOUT= 30MHz.The MAX5891 utilizes a current-steering architecture that supports a 2mA to 20mA full-scale output current range, and produces -2dBm to -22dBm full-scale output signal levels with a double-terminated 50Ω load. The MAX5891 features an integrated 1.2V bandgap reference and control amplifier to ensure high-accuracy and low-noise performance. A separate reference input (REFIO) allows for the use of an external reference source for optimum flexibility and improved gain accuracy.The MAX5891 digital inputs accept LVDS voltage levels, and the flexible clock input can be driven differentially or single-ended, AC- or DC-coupled. The MAX5891 is available in a 68-pin QFN package with an exposed paddle (EP) and is specified for the extended (-40°C to +85°C) temperature range.Refer to the MAX5890 and MAX5889 data sheets for pin-compatible 14-bit and 12-bit versions of the MAX5891.See a parametric table of the complete family of pin-compatible, 12-/14-/16-bit high-speed DACs.ApplicationsAutomated Test Equipment (ATE)Base Stations: Single-/Multicarrier UMTS, CDMA, GSMCable Modem Termination Systems (CMTS)Communications: Fixed Broadband Wireless Access, Point-to-Point MicrowaveDirect Digital Synthesis (DDS)Instrumentation

The MAX5893 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter (DAC) offers superior dynamic performance and is optimized for high-performance wideband, single-carrier transmit applications. The device integrates a selectable 2x/4x/8x interpolating filter, a digital quadrature modulator, and dual 12-bit high-speed DACs on a single integrated circuit. At 30MHz output frequency and 500Msps update rate, the in-band SFDR is 84dBc while consuming 1.1W. The device also delivers 72dB ACLR for single-carrier WCDMA at a 61.44MHz output frequency.The selectable interpolating filters allow lower input data rates while taking advantage of the high DAC update rates. These linear-phase interpolation filters ease reconstruction filter requirements and enhance the passband dynamic performance. Individual offset and gain programmability allow the user to calibrate out local oscillator (LO) feedthrough and sideband suppression errors generated by analog quadrature modulators.The MAX5893 features a fIM/4 digital image-reject modulator. This modulator generates a quadrature-modulated IF signal that can be presented to an analog I/Q modulator to complete the upconversion process. A second digital modulation mode allows the signal to be frequency-translated with image pairs at fIM/2 or fIM/4.The MAX5893 features a standard 1.8V CMOS, 3.3V tolerant data input bus for easy interface. A 3.3V SPI™ port is provided for mode configuration. The programmable modes include the selection of 2x/4x/8x interpolating filters, fIM/2, fIM/4 or no digital quadrature modulation with image rejection, channel gain and offset adjustment, and offset binary or two's complement data interface.Pin-compatible 14- and 16-bit devices are also available. Refer to theMAX5894data sheet for the 14-bit version and theMAX5895data sheet for the 16-bit version.See a parametric table of the complete family of pin-compatible 12-/14-/16-bit high-speed DACs.ApplicationsAnalog Quadrature Modulation ArchitecturesBase Stations: 3G UMTS, CDMA, and GSMBroadband Cable InfrastructureBroadband Wireless TransmittersInstrumentation and Automatic Test Equipment (ATE)